From 06d3c996dacc9e8375252dd33035677ae973057c Mon Sep 17 00:00:00 2001 From: "yu.dongliang" <18588496441@163.com> Date: Sun, 21 Jun 2026 11:00:14 +0800 Subject: [PATCH] 1, delete member 'code' of 'scf_rela_t' & use 'rela->inst->c' to get its 3ac code, 2, x64/peephole: move some 'code to make instruction' into some little functions, in order to decrease code of key functions. --- native/risc/scf_arm32.c | 97 ++++++----- native/risc/scf_arm64.c | 56 +++--- native/risc/scf_naja.c | 46 ++--- native/risc/scf_naja_inst.c | 2 +- native/risc/scf_risc.c | 10 +- native/risc/scf_risc_bb_color.c | 2 +- native/risc/scf_risc_inst.c | 264 ++++++++++++++-------------- native/risc/scf_risc_opcode.h | 56 +++--- native/risc/scf_risc_reg.c | 8 +- native/risc/scf_risc_reg_arm32.c | 12 +- native/risc/scf_risc_reg_arm64.c | 12 +- native/risc/scf_risc_reg_naja.c | 12 +- native/scf_instruction.c | 4 +- native/scf_instruction.h | 19 +- native/x64/scf_x64.c | 51 +++--- native/x64/scf_x64_inst.c | 156 ++++++++--------- native/x64/scf_x64_inst_binary.c | 36 ++-- native/x64/scf_x64_inst_cmp.c | 16 +- native/x64/scf_x64_inst_common.c | 34 ++-- native/x64/scf_x64_inst_div.c | 16 +- native/x64/scf_x64_inst_mul.c | 26 +-- native/x64/scf_x64_inst_shift.c | 12 +- native/x64/scf_x64_inst_unary.c | 2 +- native/x64/scf_x64_inst_util.c | 36 ++-- native/x64/scf_x64_opcode.h | 61 +++---- native/x64/scf_x64_peephole.c | 286 ++++++++++++++++--------------- native/x64/scf_x64_reg.c | 48 +++--- native/x64/scf_x64_reg.h | 3 +- native/x64/scf_x64_reg_util.h | 10 +- 29 files changed, 708 insertions(+), 685 deletions(-) diff --git a/native/risc/scf_arm32.c b/native/risc/scf_arm32.c index b3193be..dbb7cf3 100644 --- a/native/risc/scf_arm32.c +++ b/native/risc/scf_arm32.c @@ -22,7 +22,7 @@ int arm32_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int byte // mov rd, imm[15:0] opcode = (0xe3 << 24) | (((imm >> 12 ) & 0xf) << 16) | (rd->id << 12) | (imm & 0xfff); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); imm >>= 16; if (imm & 0xffff) { @@ -30,7 +30,7 @@ int arm32_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int byte // movk rd, imm[31:16] opcode = (0xe3 << 24) | (0x1 << 22) | (((imm >> 12 ) & 0xf) << 16) | (rd->id << 12) | (imm & 0xfff); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } return 0; @@ -70,28 +70,28 @@ int arm32_inst_ADR2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, s } inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else if (vs->global_flag) { offset = 0; opcode = (0xe3 << 24) | (rd->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_ARM_REL32; opcode = (0xe3 << 24) | (0x4 << 20) | (rd->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe7 << 24) | (0x9 << 20) | (rd->id << 16) | (rd->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe0 << 24) | (0x8 << 20) | (rd->id << 16) | (rd->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { scf_loge("temp var should give a register\n"); @@ -126,21 +126,21 @@ int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf opcode = (0xe3 << 24) | (rd->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_ARM_REL32; opcode = (0xe3 << 24) | (0x4 << 20) | (rd->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe7 << 24) | (0x9 << 20) | (rd->id << 16) | (rd->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe0 << 24) | (0x8 << 20) | (rd->id << 16) | (rd->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); rb = rd; @@ -255,7 +255,7 @@ int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf opcode = (0xe0 << 24) | (0x8 << 20) | (r12->id << 16) | (r12->id << 12) | rb->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe8 << 24) | (0xd << 20) | (r12->id << 16) | (1 << rd->id) | (1 << (rd->id + 1)); } @@ -263,7 +263,7 @@ int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf return -EINVAL; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -296,21 +296,21 @@ int arm32_inst_G2MF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, sc opcode = (0xe3 << 24) | (rb->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vd, NULL); rela->type = R_ARM_REL32; opcode = (0xe3 << 24) | (0x4 << 20) | (rb->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe7 << 24) | (0x9 << 20) | (rb->id << 16) | (rb->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (rb->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { scf_loge("temp var should give a register\n"); @@ -364,14 +364,14 @@ int arm32_inst_G2MF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, sc opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (r12->id << 12) | (0x2 << 7) | r12->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xed << 24) | (0x8 << 20) | (r12->id << 16) | (0x2 << 10) | (SIZE << 8) | 0; } opcode |= (D << 22) | (V << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -497,7 +497,7 @@ int arm32_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf opcode = (0xe0 << 24) | (0x8 << 20) | (r12->id << 16) | (r12->id << 12) | rb->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe8 << 24) | (0xc << 20) | (r12->id << 16) | (1 << rs->id) | (1 << (rs->id + 1)); } @@ -505,7 +505,7 @@ int arm32_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf return -EINVAL; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -528,21 +528,21 @@ int arm32_inst_ISTR2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, opcode = (0xe3 << 24) | (rd->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); rela->type = R_ARM_REL32; opcode = (0xe3 << 24) | (0x4 << 20) | (rd->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe7 << 24) | (0x9 << 20) | (rd->id << 16) | (rd->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe0 << 24) | (0x8 << 20) | (rd->id << 16) | (rd->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -593,13 +593,13 @@ int arm32_inst_G2PF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, sc opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (r12->id << 12) | (0x2 << 7) | r12->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xed << 24) | (0x8 << 20) | (D << 22) | (r12->id << 16) | (Vd << 12) | (0x2 << 10) | (SIZE << 8) | 0; } inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -684,7 +684,7 @@ int arm32_inst_G2P(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf return -EINVAL; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -768,7 +768,7 @@ int arm32_inst_P2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf return -EINVAL; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -795,7 +795,7 @@ int arm32_inst_ADRP2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, } inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -826,7 +826,7 @@ int arm32_inst_ADRSIB2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (rd->id << 12) | (SH << 7) | ri->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -858,7 +858,7 @@ int arm32_inst_SIB2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, s return -EINVAL; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -891,7 +891,7 @@ int arm32_inst_G2SIB(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, s return -EINVAL; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -923,21 +923,21 @@ int arm32_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc opcode = (0xe3 << 24) | (rb->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_ARM_REL32; opcode = (0xe3 << 24) | (0x4 << 20) | (rb->id << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe7 << 24) | (0x9 << 20) | (rb->id << 16) | (rb->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (rb->id << 12) | 0xf; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { scf_loge("temp var should give a register\n"); @@ -992,14 +992,14 @@ int arm32_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (r12->id << 12) | (0x2 << 7) | r12->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode = (0xed << 24) | (0x9 << 20) | (r12->id << 16) | (0x2 << 10) | (SIZE << 8) | 0; } opcode |= (D << 22) | (V << 12); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -1937,7 +1937,7 @@ int arm32_inst_BL(scf_3ac_code_t* c, scf_function_t* f, scf_function_t* pf) opcode = 0xeb << 24; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->text_relas, rela, c, NULL, pf); rela->type = R_ARM_CALL; @@ -2151,7 +2151,7 @@ int arm32_cmp_update(scf_3ac_code_t* c, scf_function_t* f, scf_instruction_t* cm i0 = (opcode >> 16) & 0xf; r0 = f->rops->find_register_type_id_bytes(0, i0, 4); inst = f->iops->MOV_G(c, r12, r0); // use r12 to backup r0 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode &= ~(0xf << 16); opcode |= (0xc << 16); @@ -2163,11 +2163,11 @@ int arm32_cmp_update(scf_3ac_code_t* c, scf_function_t* f, scf_instruction_t* cm r0 = f->rops->find_register_type_id_bytes(0, i0, 4); inst = f->iops->MOV_G(c, r12, r0); // use r16 to backup r0 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); r0 = f->rops->find_register_type_id_bytes(0, i1, 4); inst = f->iops->MOV_G(c, r14, r0); // use r17 to backup r1 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode &= ~(0xf << 16); opcode |= (0xc << 16); @@ -2215,7 +2215,7 @@ int arm32_set_rel_veneer(scf_function_t* f) int offset = bytes - r->inst_offset - 16; // 'pc = current + 8' inst = risc_make_inst(end, offset - 4); - RISC_INST_ADD_CHECK(end->instructions, inst); + RISC_INST_ADD_CHECK(end, inst); r->inst_offset = bytes; @@ -2230,16 +2230,16 @@ int arm32_set_rel_veneer(scf_function_t* f) r->inst->code[2] |= 0x0f & (offset >> 12); int j; - for (j = 0; j < r->code->instructions->size; j++) { - inst = r->code->instructions->data[j]; + for (j = 0; j < r->inst->c->instructions->size; j++) { + inst = r->inst->c->instructions->data[j]; if (inst == r->inst) break; } - assert(r->code->instructions->size > j + 1); + assert(r->inst->c->instructions->size > j + 1); - inst = r->code->instructions->data[j + 1]; + inst = r->inst->c->instructions->data[j + 1]; inst->code[0] = 0xff & (offset >> 16); inst->code[1] &= 0xf0; @@ -2337,4 +2337,3 @@ scf_inst_ops_t inst_ops_arm32 = .set_jmp_offset = arm32_set_jmp_offset, .set_rel_veneer = arm32_set_rel_veneer, }; - diff --git a/native/risc/scf_arm64.c b/native/risc/scf_arm64.c index 618e909..ae8711d 100644 --- a/native/risc/scf_arm64.c +++ b/native/risc/scf_arm64.c @@ -12,13 +12,13 @@ int arm64_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int byte // movn rd, invert[15:0] opcode = (0x92 << 24) | (0x1 << 23) | ((invert & 0xffff) << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (invert >> 16) { // movk rd, imm[31:16] opcode = (0xf2 << 24) | (0x1 << 23) | (0x1 << 21) | (((imm >> 16) & 0xffff) << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } return 0; @@ -27,14 +27,14 @@ int arm64_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int byte // mov rd, imm[15:0] opcode = (0xd2 << 24) | (0x1 << 23) | ((imm & 0xffff) << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if ((imm >> 16) & 0xffff) { // movk rd, imm[31:16] opcode = (0xf2 << 24) | (0x1 << 23) | (0x1 << 21) | (((imm >> 16) & 0xffff) << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } if (8 == bytes) { @@ -44,7 +44,7 @@ int arm64_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int byte // movk rd, imm[47:32] opcode = (0xf2 << 24) | (0x1 << 23) | (0x2 << 21) | (((imm >> 32) & 0xffff) << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } if ((imm >> 48) & 0xffff) { @@ -52,7 +52,7 @@ int arm64_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int byte // movk rd, imm[63:48] opcode = (0xf2 << 24) | (0x1 << 23) | (0x3 << 21) | (((imm >> 48) & 0xffff) << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } } @@ -93,20 +93,20 @@ int arm64_inst_ADR2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, s } inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else if (vs->global_flag) { offset = 0; opcode = (0x90 << 24) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_AARCH64_ADR_PREL_PG_HI21; opcode = (0x91 << 24) | (rd->id << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_AARCH64_ADD_ABS_LO12_NC; @@ -143,13 +143,13 @@ int arm64_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf opcode = (0x90 << 24) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_AARCH64_ADR_PREL_PG_HI21; opcode = (0x91 << 24) | (rd->id << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_AARCH64_ADD_ABS_LO12_NC; @@ -234,7 +234,7 @@ int arm64_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf opcode |= RISC_COLOR_TYPE(rd->color) << 26; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -346,7 +346,7 @@ int arm64_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf opcode |= RISC_COLOR_TYPE(rs->color) << 26; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -369,13 +369,13 @@ int arm64_inst_ISTR2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, opcode = (0x90 << 24) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); rela->type = R_AARCH64_ADR_PREL_PG_HI21; opcode = (0x91 << 24) | (rd->id << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); rela->type = R_AARCH64_ADD_ABS_LO12_NC; @@ -456,7 +456,7 @@ int arm64_inst_G2P(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf opcode |= RISC_COLOR_TYPE(rs->color) << 26; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -535,7 +535,7 @@ int arm64_inst_P2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf opcode |= RISC_COLOR_TYPE(rd->color) << 26; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -574,7 +574,7 @@ int arm64_inst_ADRP2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, } inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -608,7 +608,7 @@ int arm64_inst_ADRSIB2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd opcode = (0x8b << 24) | (ri->id << 16) | (SH << 10) | (rb->id << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -653,7 +653,7 @@ int arm64_inst_SIB2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, s opcode |= RISC_COLOR_TYPE(rd->color) << 26; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -699,7 +699,7 @@ int arm64_inst_G2SIB(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, s opcode |= RISC_COLOR_TYPE(rs->color) << 26; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -733,13 +733,13 @@ int arm64_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc opcode = (0x90 << 24) | rb->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_AARCH64_ADR_PREL_PG_HI21; opcode = (0x91 << 24) | (rb->id << 5) | rb->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_AARCH64_ADD_ABS_LO12_NC; @@ -812,7 +812,7 @@ int arm64_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc opcode |= (SIZE << 30) | (rb->id << 5) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -1314,7 +1314,7 @@ int arm64_inst_BL(scf_3ac_code_t* c, scf_function_t* f, scf_function_t* pf) opcode = 0x25 << 26; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->text_relas, rela, c, NULL, pf); rela->type = R_AARCH64_CALL26; @@ -1550,7 +1550,7 @@ int arm64_cmp_update(scf_3ac_code_t* c, scf_function_t* f, scf_instruction_t* cm i0 = (opcode >> 5) & 0x1f; r0 = f->rops->find_register_type_id_bytes(0, i0, 8); inst = f->iops->MOV_G(c, r16, r0); // use r16 to backup r0 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode &= ~(0x1f << 5); opcode |= (0x10 << 5); @@ -1562,11 +1562,11 @@ int arm64_cmp_update(scf_3ac_code_t* c, scf_function_t* f, scf_instruction_t* cm r0 = f->rops->find_register_type_id_bytes(0, i0, 8); inst = f->iops->MOV_G(c, r16, r0); // use r16 to backup r0 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); r0 = f->rops->find_register_type_id_bytes(0, i1, 8); inst = f->iops->MOV_G(c, r17, r0); // use r17 to backup r1 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode &= ~(0x1f << 5); opcode |= (0x10 << 5); diff --git a/native/risc/scf_naja.c b/native/risc/scf_naja.c index 3dd88ab..6042b04 100644 --- a/native/risc/scf_naja.c +++ b/native/risc/scf_naja.c @@ -13,13 +13,13 @@ int naja_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int bytes // mvn rd, invert[15:0] opcode = (0xe << 26) | (rd->id << 21) | (0x3 << 18) | (0x3 << 16) | (invert & 0xffff); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (invert >> 16) { // movt rd, imm[31:16] opcode = (0xe << 26) | (rd->id << 21) | (0x1 << 18) | (0x2 << 16)| ((imm >> 16) & 0xffff); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } return 0; @@ -27,7 +27,7 @@ int naja_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int bytes // mov rd, imm[15:0] inst = naja_inst_MOV_IMM(c, rd, imm & 0xffff); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); imm >>= 16; if (imm & 0xffff) { @@ -35,7 +35,7 @@ int naja_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int bytes // movt rd, imm[31:16] opcode = (0xe << 26) | (rd->id << 21) | (1 << 18) | (0x2 << 16) | (imm & 0xffff); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } imm >>= 16; @@ -44,7 +44,7 @@ int naja_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int bytes // movk rd, imm[47:32] opcode = (0xe << 26) | (rd->id << 21) | (2 << 18) | (0x2 << 16) | (imm & 0xffff); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } imm >>= 16; @@ -53,7 +53,7 @@ int naja_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int bytes // movk rd, imm[63:48] opcode = (0xe << 26) | (rd->id << 21) | (3 << 18) | (0x2 << 16) | (imm & 0xffff); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } return 0; @@ -93,19 +93,19 @@ int naja_inst_ADR2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc } inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else if (vs->global_flag) { offset = 0; inst = __naja_inst_ADRP(c, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_AARCH64_ADR_PREL_PG_HI21; opcode = (0 << 26) | (rd->id << 21) | (0x3 << 18) | (0x3 << 16) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vs, NULL); rela->type = R_AARCH64_ADD_ABS_LO12_NC; @@ -220,7 +220,7 @@ int naja_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_ opcode |= RISC_COLOR_TYPE(rd->color) << 30; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -329,7 +329,7 @@ int naja_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf_ // opcode |= (1 << 18); inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -351,13 +351,13 @@ int naja_inst_ISTR2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, s uint32_t opcode; inst = __naja_inst_ADRP(c, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); rela->type = R_AARCH64_ADR_PREL_PG_HI21; opcode = (0 << 26) | (rd->id << 21) | (0x3 << 18) | (0x3 << 16) | rd->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); rela->type = R_AARCH64_ADD_ABS_LO12_NC; @@ -430,7 +430,7 @@ int naja_inst_G2P(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf_ opcode |= RISC_COLOR_TYPE(rs->color) << 30; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -501,7 +501,7 @@ int naja_inst_P2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_ opcode |= RISC_COLOR_TYPE(rd->color) << 30; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -531,7 +531,7 @@ int naja_inst_ADRP2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, s } inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -565,7 +565,7 @@ int naja_inst_ADRSIB2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, opcode = (0 << 26) | (rd->id << 21) | (3 << 18) | (SH << 16) | (ri->id << 4) | rb->id; inst = risc_make_inst(c, opcode); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -573,7 +573,7 @@ int naja_inst_SIB2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc { scf_instruction_t* inst = __naja_inst_SIB2G(c, rd, sib); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -581,7 +581,7 @@ int naja_inst_G2SIB(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, sc { scf_instruction_t* inst = __naja_inst_G2SIB(c, rs, sib); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -597,7 +597,7 @@ int naja_inst_BL(scf_3ac_code_t* c, scf_function_t* f, scf_function_t* pf) inst = __naja_inst_BL(c, 0); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->text_relas, rela, c, NULL, pf); rela->type = R_AARCH64_CALL26; @@ -631,7 +631,7 @@ int naja_cmp_update(scf_3ac_code_t* c, scf_function_t* f, scf_instruction_t* cmp i0 = opcode & 0xf; r0 = f->rops->find_register_type_id_bytes(0, i0, 8); inst = f->iops->MOV_G(c, r10, r0); // use r10 to backup r0 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode &= ~0xf; opcode |= 0xa; @@ -641,11 +641,11 @@ int naja_cmp_update(scf_3ac_code_t* c, scf_function_t* f, scf_instruction_t* cmp r0 = f->rops->find_register_type_id_bytes(0, i0, 8); inst = f->iops->MOV_G(c, r10, r0); // use r10 to backup r0 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); r0 = f->rops->find_register_type_id_bytes(0, i1, 8); inst = f->iops->MOV_G(c, r11, r0); // use r11 to backup r1 - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); opcode &= ~0xf; opcode |= 0xa; diff --git a/native/risc/scf_naja_inst.c b/native/risc/scf_naja_inst.c index f733572..57bdf09 100644 --- a/native/risc/scf_naja_inst.c +++ b/native/risc/scf_naja_inst.c @@ -22,7 +22,7 @@ scf_instruction_t* __naja_inst_ADRP(scf_3ac_code_t* c, scf_register_t* rd) if (inst) { inst->OpCode = (scf_OpCode_t*)risc_find_OpCode(SCF_RISC_ADRP, 8,8, SCF_RISC_E2G); inst->dst.base = rd; - inst->src.flag = 1; + inst->src.mem_flag = 1; } return inst; diff --git a/native/risc/scf_risc.c b/native/risc/scf_risc.c index 8b5850b..b38529e 100644 --- a/native/risc/scf_risc.c +++ b/native/risc/scf_risc.c @@ -207,11 +207,11 @@ static int _risc_function_finish(scf_native_t* ctx, scf_function_t* f) if (f->bp_used_flag) { inst = ctx->iops->PUSH(NULL, fp); - RISC_INST_ADD_CHECK(f->init_code->instructions, inst); + RISC_INST_ADD_CHECK(f->init_code, inst); f->init_code_bytes = inst->len; inst = ctx->iops->MOV_SP(NULL, fp, sp); - RISC_INST_ADD_CHECK(f->init_code->instructions, inst); + RISC_INST_ADD_CHECK(f->init_code, inst); f->init_code_bytes += inst->len; uint32_t local = f->local_vars_size + fp->bytes; @@ -231,8 +231,8 @@ static int _risc_function_finish(scf_native_t* ctx, scf_function_t* f) local <<= 12; } - inst = ctx->iops->SUB_IMM(f->init_code, f, sp, sp, local); - RISC_INST_ADD_CHECK(f->init_code->instructions, inst); + inst = ctx->iops->SUB_IMM(f->init_code, f, sp, sp, local); + RISC_INST_ADD_CHECK(f->init_code, inst); f->init_code_bytes += inst->len; int ret = _risc_save_rabi(f); @@ -674,8 +674,8 @@ static void _risc_set_offset_for_relas(scf_native_t* ctx, scf_function_t* f, scf for (i = 0; i < relas->size; i++) { scf_rela_t* rela = relas->data[i]; - scf_3ac_code_t* c = rela->code; scf_instruction_t* inst = rela->inst; + scf_3ac_code_t* c = inst->c; scf_basic_block_t* cur_bb = c->basic_block; scf_instruction_t* inst2; diff --git a/native/risc/scf_risc_bb_color.c b/native/risc/scf_risc_bb_color.c index ee58d60..fe97d37 100644 --- a/native/risc/scf_risc_bb_color.c +++ b/native/risc/scf_risc_bb_color.c @@ -204,7 +204,7 @@ int risc_bb_load_dn2(intptr_t color, scf_dag_node_t* dn, scf_basic_block_t* bb, return ret; if (cmp) - RISC_INST_ADD_CHECK(c->instructions, cmp); + RISC_INST_ADD_CHECK(c, cmp); return 0; } diff --git a/native/risc/scf_risc_inst.c b/native/risc/scf_risc_inst.c index c0d0143..7f13d91 100644 --- a/native/risc/scf_risc_inst.c +++ b/native/risc/scf_risc_inst.c @@ -177,7 +177,7 @@ static int _risc_inst_call_argv(scf_native_t* ctx, scf_3ac_code_t* c, scf_functi inst = ctx->iops->CVTSS2SD(c, rs, rs); } - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } if (!rd) { @@ -205,7 +205,7 @@ static int _risc_inst_call_argv(scf_native_t* ctx, scf_3ac_code_t* c, scf_functi else inst = ctx->iops->FMOV_G(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } ret = risc_rcg_make(c, c->rcg, NULL, rd); @@ -373,7 +373,7 @@ static int _risc_call_update_dsts(scf_native_t* ctx, scf_3ac_code_t* c, scf_func int valid = _risc_dst_reg_valid(f, rd, updated_regs, nb_updated, idx_int, nb_int); if (valid) { inst = ctx->iops->MOV_G(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); assert(nb_updated < max_updated); @@ -479,8 +479,8 @@ static int _risc_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (stack_size > 0) { inst_sp = risc_make_inst(c, 0); inst_sp2 = risc_make_inst(c, 0); - RISC_INST_ADD_CHECK(c->instructions, inst_sp); - RISC_INST_ADD_CHECK(c->instructions, inst_sp2); + RISC_INST_ADD_CHECK(c, inst_sp); + RISC_INST_ADD_CHECK(c, inst_sp2); } ret = _risc_inst_call_argv(ctx, c, f); @@ -576,7 +576,7 @@ static int _risc_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) } inst = ctx->iops->BLR(c, r_pf); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { scf_loge("\n"); @@ -586,7 +586,7 @@ static int _risc_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (stack_size > 0) { inst = ctx->iops->ADD_IMM(c, f, sp, sp, stack_size); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } int nb_updated = 0; @@ -663,7 +663,7 @@ static int _risc_inst_bit_not_handler(scf_native_t* ctx, scf_3ac_code_t* c) inst = ctx->iops->MVN(c, rd, rs); } - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -695,7 +695,7 @@ static int _risc_inst_inc_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = ctx->iops->ADD_IMM(c, f, rs, rs, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -737,10 +737,10 @@ static int _risc_inst_inc_post_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = ctx->iops->MOV_G(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->ADD_IMM(c, f, rs, rs, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -772,7 +772,7 @@ static int _risc_inst_dec_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = ctx->iops->SUB_IMM(c, f, rs, rs, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -814,10 +814,10 @@ static int _risc_inst_dec_post_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = ctx->iops->MOV_G(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->SUB_IMM(c, f, rs, rs, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -879,7 +879,7 @@ static int _risc_inst_neg_handler(scf_native_t* ctx, scf_3ac_code_t* c) inst = ctx->iops->NEG(c, rd, rs); } - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -892,13 +892,13 @@ static int _risc_inst_neg_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rd, dst->dag_node, c, f, 0); inst = ctx->iops->E2G(pxor, rd, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (src->dag_node->color > 0) { RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = ctx->iops->E2G(sub, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { scf_rela_t* rela = NULL; @@ -912,7 +912,7 @@ static int _risc_inst_neg_handler(scf_native_t* ctx, scf_3ac_code_t* c) } inst = ctx->iops->M2G(&rela, sub, rd, NULL, v); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); RISC_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); } #endif @@ -1038,7 +1038,7 @@ static int _risc_inst_inc_pointer_handler(scf_native_t* ctx, scf_3ac_code_t* c) return ret; inst = ctx->iops->ADD_IMM(c, f, r, r, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, r, &sib); @@ -1105,7 +1105,7 @@ static int _risc_inst_dec_pointer_handler(scf_native_t* ctx, scf_3ac_code_t* c) return ret; inst = ctx->iops->SUB_IMM(c, f, r, r, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, r, &sib); @@ -1178,7 +1178,7 @@ static int _risc_inst_inc_post_pointer_handler(scf_native_t* ctx, scf_3ac_code_t return ret; inst = ctx->iops->ADD_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, rd, &sib); @@ -1188,7 +1188,7 @@ static int _risc_inst_inc_post_pointer_handler(scf_native_t* ctx, scf_3ac_code_t return ret; inst = ctx->iops->SUB_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -1256,7 +1256,7 @@ static int _risc_inst_dec_post_pointer_handler(scf_native_t* ctx, scf_3ac_code_t return ret; inst = ctx->iops->SUB_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, rd, &sib); @@ -1266,7 +1266,7 @@ static int _risc_inst_dec_post_pointer_handler(scf_native_t* ctx, scf_3ac_code_t return ret; inst = ctx->iops->ADD_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -1377,7 +1377,7 @@ static int _risc_inst_inc_array_index_handler(scf_native_t* ctx, scf_3ac_code_t* return ret; inst = ctx->iops->ADD_IMM(c, f, r, r, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, r, &sib); @@ -1444,7 +1444,7 @@ static int _risc_inst_dec_array_index_handler(scf_native_t* ctx, scf_3ac_code_t* return ret; inst = ctx->iops->SUB_IMM(c, f, r, r, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, r, &sib); @@ -1515,7 +1515,7 @@ static int _risc_inst_inc_post_array_index_handler(scf_native_t* ctx, scf_3ac_co return ret; inst = ctx->iops->ADD_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, rd, &sib); @@ -1525,7 +1525,7 @@ static int _risc_inst_inc_post_array_index_handler(scf_native_t* ctx, scf_3ac_co return ret; inst = ctx->iops->SUB_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -1591,7 +1591,7 @@ static int _risc_inst_dec_post_array_index_handler(scf_native_t* ctx, scf_3ac_co return ret; inst = ctx->iops->SUB_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, rd, &sib); @@ -1601,7 +1601,7 @@ static int _risc_inst_dec_post_array_index_handler(scf_native_t* ctx, scf_3ac_co return ret; inst = ctx->iops->ADD_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -1779,7 +1779,7 @@ static int _risc_inst_push_rax_handler(scf_native_t* ctx, scf_3ac_code_t* c) #if 0 push = risc_find_OpCode(SCF_RISC_PUSH, 8,8, SCF_RISC_G); inst = ctx->iops->G(push, rax); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; #endif return -1; @@ -1801,7 +1801,7 @@ static int _risc_inst_pop_rax_handler(scf_native_t* ctx, scf_3ac_code_t* c) #if 0 pop = risc_find_OpCode(SCF_RISC_POP, 8,8, SCF_RISC_G); inst = ctx->iops->G(pop, rax); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; #endif return -1; @@ -1857,33 +1857,33 @@ static int _risc_inst_va_start_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rptr, ptr->dag_node, c, f, 0); inst = ctx->iops->P2G(lea, rptr, rbp, offset_int); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->G2P(mov, rap, 0, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->P2G(lea, rptr, rbp, offset_float); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->G2P(mov, rap, 8, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->P2G(lea, rptr, rbp, offset_others); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->G2P(mov, rap, 16, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); mov = risc_find_OpCode(SCF_RISC_MOV, 4, 8, SCF_RISC_I2E); inst = ctx->iops->I2P(mov, rap, 24, (uint8_t*)&f->args_int, 4); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->I2P(mov, rap, 32, (uint8_t*)&f->args_float, 4); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; #endif return -1; @@ -1924,22 +1924,22 @@ static int _risc_inst_va_end_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rptr, ptr->dag_node, c, f, 0); inst = ctx->iops->G2E(xor, rptr, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->G2P(mov, rap, 0, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->G2P(mov, rap, 8, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->G2P(mov, rap, 16, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->G2P(mov, rap, 24, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->G2P(mov, rap, 32, rptr); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); ptr->dag_node->var->tmp_flag = 0; ptr->dag_node->color = 0; @@ -2010,22 +2010,22 @@ static int _risc_inst_va_arg_handler(scf_native_t* ctx, scf_3ac_code_t* c) } inst = ctx->iops->I2P(cmp, rap, idx_offset, (uint8_t*)&nints, 4); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst_jge = ctx->iops->I(jge, (uint8_t*)&offset, sizeof(offset)); - RISC_INST_ADD_CHECK(c->instructions, inst_jge); + RISC_INST_ADD_CHECK(c, inst_jge); inst = ctx->iops->P2G(mov, rptr, rap, ptr_offset); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); offset += inst->len; inst = ctx->iops->I2P(sub, rap, ptr_offset, (uint8_t*)&incptr, 4); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); offset += inst->len; inst_jmp = ctx->iops->I(jmp, (uint8_t*)&offset, sizeof(offset)); - RISC_INST_ADD_CHECK(c->instructions, inst_jmp); + RISC_INST_ADD_CHECK(c, inst_jmp); offset += inst_jmp->len; uint8_t* p = (uint8_t*)&offset; @@ -2035,18 +2035,18 @@ static int _risc_inst_va_arg_handler(scf_native_t* ctx, scf_3ac_code_t* c) offset = 0; inst = ctx->iops->P2G(mov, rptr, rap, 16); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); offset += inst->len; inst = ctx->iops->I2P(add, rap, 16, (uint8_t*)&incptr, 4); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); offset += inst->len; for (i = 0; i < 4; i++) inst_jmp->code[jmp->nb_OpCodes + i] = p[i]; inst = ctx->iops->P(inc, rap, idx_offset, 8); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (is_float) { if (4 == size) @@ -2059,7 +2059,7 @@ static int _risc_inst_va_arg_handler(scf_native_t* ctx, scf_3ac_code_t* c) mov2 = risc_find_OpCode(SCF_RISC_MOV, size, size, SCF_RISC_E2G); inst = ctx->iops->P2G(mov2, rd, rptr, 0); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; #endif @@ -2153,7 +2153,7 @@ static int _risc_inst_div_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs1, s1, c, f, 1); inst = ctx->iops->FDIV(c, rd, rs0, rs1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2203,7 +2203,7 @@ static int _risc_inst_div_handler(scf_native_t* ctx, scf_3ac_code_t* c) else inst = ctx->iops->DIV(c, rd, rs0, rs1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2282,10 +2282,10 @@ static int _risc_inst_mod_handler(scf_native_t* ctx, scf_3ac_code_t* c) inst = ctx->iops->SDIV(c, rd, rs0, rs1); else inst = ctx->iops->DIV(c, rd, rs0, rs1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->MSUB(c, rd, rs1, rd, rs0); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2331,7 +2331,7 @@ static int _risc_inst_mul_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->FMUL(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2350,7 +2350,7 @@ static int _risc_inst_mul_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->MUL(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); s1->color = 0; s1->loaded = 0; @@ -2362,7 +2362,7 @@ static int _risc_inst_mul_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->MUL(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2416,7 +2416,7 @@ static int _risc_inst_mul_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->FMUL(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2434,7 +2434,7 @@ static int _risc_inst_mul_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->MUL(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); s->color = 0; s->loaded = 0; @@ -2446,7 +2446,7 @@ static int _risc_inst_mul_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->MUL(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2488,7 +2488,7 @@ static int _risc_inst_add_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->FADD(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2510,7 +2510,7 @@ static int _risc_inst_add_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rn, s0, c, f, 1); inst = ctx->iops->ADD_IMM(c, f, rd, rn, u); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2519,7 +2519,7 @@ static int _risc_inst_add_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->ADD_G(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2578,7 +2578,7 @@ static int _risc_inst_add_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->FADD(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2599,7 +2599,7 @@ static int _risc_inst_add_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rd, d, c, f, 0); inst = ctx->iops->ADD_IMM(c, f, rd, rd, u); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2607,7 +2607,7 @@ static int _risc_inst_add_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->ADD_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2666,7 +2666,7 @@ static int _risc_inst_sub_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->FSUB(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2687,7 +2687,7 @@ static int _risc_inst_sub_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rd, d, c, f, 0); inst = ctx->iops->SUB_IMM(c, f, rd, rd, u); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2695,7 +2695,7 @@ static int _risc_inst_sub_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->SUB_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2738,7 +2738,7 @@ static int _risc_inst_sub_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->FSUB(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2767,11 +2767,11 @@ static int _risc_inst_sub_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rn, s0, c, f, 1); inst = ctx->iops->SUB_IMM(c, f, rd, rn, u); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (neg) { inst = ctx->iops->NEG(c, rd, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } return 0; } @@ -2781,7 +2781,7 @@ static int _risc_inst_sub_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->SUB_G(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2837,7 +2837,7 @@ static int _risc_inst_bit_and_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->AND_G(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); s1->color = 0; s1->loaded = 0; @@ -2849,7 +2849,7 @@ static int _risc_inst_bit_and_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->AND_G(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2901,7 +2901,7 @@ static int _risc_inst_bit_or_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->OR_G(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); s1->color = 0; s1->loaded = 0; @@ -2913,7 +2913,7 @@ static int _risc_inst_bit_or_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rm, s1, c, f, 1); inst = ctx->iops->OR_G(c, rd, rn, rm); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -2976,7 +2976,7 @@ static int _risc_inst_and_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->AND_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); s->color = 0; s->loaded = 0; @@ -2988,7 +2988,7 @@ static int _risc_inst_and_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->AND_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3051,7 +3051,7 @@ static int _risc_inst_or_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->OR_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); s->color = 0; s->loaded = 0; @@ -3063,7 +3063,7 @@ static int _risc_inst_or_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->OR_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3098,7 +3098,7 @@ static int _risc_inst_teq_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = ctx->iops->TEQ(c, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3128,7 +3128,7 @@ static int _risc_inst_setz_handler(scf_native_t* ctx, scf_3ac_code_t* c) SET_INIT(); inst = ctx->iops->SETZ(c, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3136,35 +3136,35 @@ static int _risc_inst_setnz_handler(scf_native_t* ctx, scf_3ac_code_t* c) { SET_INIT(); inst = ctx->iops->SETNZ(c, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } static int _risc_inst_setge_handler(scf_native_t* ctx, scf_3ac_code_t* c) { SET_INIT(); inst = ctx->iops->SETGE(c, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } static int _risc_inst_setgt_handler(scf_native_t* ctx, scf_3ac_code_t* c) { SET_INIT(); inst = ctx->iops->SETGT(c, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } static int _risc_inst_setlt_handler(scf_native_t* ctx, scf_3ac_code_t* c) { SET_INIT(); inst = ctx->iops->SETLT(c, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } static int _risc_inst_setle_handler(scf_native_t* ctx, scf_3ac_code_t* c) { SET_INIT(); inst = ctx->iops->SETLE(c, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3233,7 +3233,7 @@ static int _risc_inst_cmp_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs1, ds1, c, f, 1); inst = ctx->iops->FCMP(c, rs0, rs1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3259,14 +3259,14 @@ static int _risc_inst_cmp_handler(scf_native_t* ctx, scf_3ac_code_t* c) assert(0 == scf_vector_del(rs1->dag_nodes, ds1)); } - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } RISC_SELECT_REG_CHECK(&rs1, ds1, c, f, 1); inst = ctx->iops->CMP_G(c, rs0, rs1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3355,7 +3355,7 @@ static int _risc_inst_cast_handler(scf_native_t* ctx, scf_3ac_code_t* c) inst = ctx->iops->CVTF2UI(c, rd, rs); } - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } else if (scf_variable_float(vd)) { @@ -3384,7 +3384,7 @@ static int _risc_inst_cast_handler(scf_native_t* ctx, scf_3ac_code_t* c) else inst = ctx->iops->CVTUI2F(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3415,7 +3415,7 @@ static int _risc_inst_cast_handler(scf_native_t* ctx, scf_3ac_code_t* c) } else inst = ctx->iops->MOV_G(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3469,7 +3469,7 @@ static int _risc_inst_div_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->FDIV(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3498,7 +3498,7 @@ static int _risc_inst_div_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) else inst = ctx->iops->DIV(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3576,10 +3576,10 @@ static int _risc_inst_mod_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) inst = ctx->iops->SDIV(c, r, rd, rs); else inst = ctx->iops->DIV(c, r, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->MSUB(c, rd, rs, r, rd); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3675,7 +3675,7 @@ static int _risc_inst_return_handler(scf_native_t* ctx, scf_3ac_code_t* c) inst = ctx->iops->MOV_G(c, rd, rs); } else inst = ctx->iops->MOV_G(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); scf_instruction_t* tmp; int j; @@ -3748,7 +3748,7 @@ static int _risc_inst_memset_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (0 == dn->color) { \ mov = risc_find_OpCode(SCF_RISC_MOV, size, size, SCF_RISC_I2G); \ inst = ctx->iops->I2G(mov, r, (uint8_t*)&dn->var->data, size); \ - RISC_INST_ADD_CHECK(c->instructions, inst); \ + RISC_INST_ADD_CHECK(c, inst); \ \ } else { \ if (dn->color < 0) \ @@ -3758,7 +3758,7 @@ static int _risc_inst_memset_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (!RISC_COLOR_CONFLICT(rd->color, r->color)) { \ mov = risc_find_OpCode(SCF_RISC_MOV, size, size, SCF_RISC_G2E); \ inst = ctx->iops->G2E(mov, r, rd); \ - RISC_INST_ADD_CHECK(c->instructions, inst); \ + RISC_INST_ADD_CHECK(c, inst); \ } \ } \ } while (0) @@ -3768,7 +3768,7 @@ static int _risc_inst_memset_handler(scf_native_t* ctx, scf_3ac_code_t* c) stos = risc_find_OpCode(SCF_RISC_STOS, 1, 8, SCF_RISC_G); inst = risc_make_inst(stos, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; #endif @@ -3800,13 +3800,13 @@ static int _risc_inst_end_handler(scf_native_t* ctx, scf_3ac_code_t* c) return ret; inst = ctx->iops->MOV_SP(c, sp, fp); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->POP(c, fp); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); inst = ctx->iops->RET(c); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -3829,7 +3829,7 @@ static int _risc_inst_##name##_handler(scf_native_t* ctx, scf_3ac_code_t* c) \ } \ \ inst = ctx->iops->NAME(c); \ - RISC_INST_ADD_CHECK(c->instructions, inst); \ + RISC_INST_ADD_CHECK(c, inst); \ return 0;\ } @@ -4030,7 +4030,7 @@ static int _risc_inst_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, d, c, f, 1); inst = ctx->iops->FMOV_G(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -4053,7 +4053,7 @@ static int _risc_inst_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c) RISC_SELECT_REG_CHECK(&rs, s, c, f, 1); inst = ctx->iops->MOV_G(c, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -4135,7 +4135,7 @@ static int _risc_inst_shift(scf_native_t* ctx, scf_3ac_code_t* c) } else inst = ctx->iops->SHL(c, rd, rs0, rs1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -4195,7 +4195,7 @@ static int _risc_inst_shift_assign(scf_native_t* ctx, scf_3ac_code_t* c) } else inst = ctx->iops->SHL(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -4357,7 +4357,7 @@ static int _risc_inst_add_assign_dereference_handler(scf_native_t* ctx, scf_3ac_ inst = ctx->iops->ADD_G(c, rd, rd, rs); else inst = ctx->iops->FADD(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, rd, sib.base, sib.disp, sib.size); } @@ -4436,7 +4436,7 @@ static int _risc_inst_sub_assign_dereference_handler(scf_native_t* ctx, scf_3ac_ inst = ctx->iops->SUB_G(c, rd, rd, rs); else inst = ctx->iops->FSUB(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, rd, sib.base, sib.disp, sib.size); } @@ -4505,7 +4505,7 @@ static int _risc_inst_and_assign_dereference_handler(scf_native_t* ctx, scf_3ac_ return ret; inst = ctx->iops->AND_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, rd, sib.base, sib.disp, sib.size); } @@ -4582,7 +4582,7 @@ static int _risc_inst_or_assign_dereference_handler(scf_native_t* ctx, scf_3ac_c return ret; inst = ctx->iops->OR_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, rd, sib.base, sib.disp, sib.size); } @@ -4816,7 +4816,7 @@ static int _risc_inst_sub_assign_pointer_handler(scf_native_t* ctx, scf_3ac_code return ret; inst = ctx->iops->SUB_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, rd, sib.base, sib.disp, sib.size); } @@ -4898,7 +4898,7 @@ static int _risc_inst_and_assign_pointer_handler(scf_native_t* ctx, scf_3ac_code return ret; inst = ctx->iops->OR_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, rd, sib.base, sib.disp, sib.size); } @@ -4980,7 +4980,7 @@ static int _risc_inst_or_assign_pointer_handler(scf_native_t* ctx, scf_3ac_code_ return ret; inst = ctx->iops->OR_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, rd, sib.base, sib.disp, sib.size); } @@ -5157,7 +5157,7 @@ static int _risc_inst_add_assign_array_index_handler(scf_native_t* ctx, scf_3ac_ inst = ctx->iops->ADD_G(c, rd, rd, rs); else inst = ctx->iops->FADD(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, rd, &sib); @@ -5256,7 +5256,7 @@ static int _risc_inst_sub_assign_array_index_handler(scf_native_t* ctx, scf_3ac_ inst = ctx->iops->SUB_G(c, rd, rd, rs); else inst = ctx->iops->FSUB(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); rs = rd; @@ -5348,7 +5348,7 @@ static int _risc_inst_and_assign_array_index_handler(scf_native_t* ctx, scf_3ac_ return ret; inst = ctx->iops->AND_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) ret = ctx->iops->G2SIB(c, f, rd, &sib); @@ -5438,7 +5438,7 @@ static int _risc_inst_or_assign_array_index_handler(scf_native_t* ctx, scf_3ac_c return ret; inst = ctx->iops->OR_G(c, rd, rd, rs); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); if (sib.index) return ctx->iops->G2SIB(c, f, rd, &sib); @@ -5486,7 +5486,7 @@ static int _risc_inst_dec_dereference_handler(scf_native_t* ctx, scf_3ac_code_t* return ret; inst = ctx->iops->SUB_IMM(c, f, r, r, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, r, sib.base, 0, size); } @@ -5531,7 +5531,7 @@ static int _risc_inst_inc_dereference_handler(scf_native_t* ctx, scf_3ac_code_t* return ret; inst = ctx->iops->ADD_IMM(c, f, r, r, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return ctx->iops->G2P(c, f, r, sib.base, 0, size); } @@ -5575,14 +5575,14 @@ static int _risc_inst_dec_post_dereference_handler(scf_native_t* ctx, scf_3ac_co return ret; inst = ctx->iops->SUB_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); ret = ctx->iops->G2P(c, f, rd, sib.base, 0, size); if (ret < 0) return ret; inst = ctx->iops->ADD_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } @@ -5625,14 +5625,14 @@ static int _risc_inst_inc_post_dereference_handler(scf_native_t* ctx, scf_3ac_co return ret; inst = ctx->iops->ADD_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); ret = ctx->iops->G2P(c, f, rd, sib.base, 0, size); if (ret < 0) return ret; inst = ctx->iops->SUB_IMM(c, f, rd, rd, 1); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); return 0; } diff --git a/native/risc/scf_risc_opcode.h b/native/risc/scf_risc_opcode.h index c1f7653..d11bce9 100644 --- a/native/risc/scf_risc_opcode.h +++ b/native/risc/scf_risc_opcode.h @@ -33,58 +33,60 @@ scf_risc_OpCode_t* risc_find_OpCode (const int type, const int OpBytes scf_instruction_t* risc_make_inst(scf_3ac_code_t* c, uint32_t opcode); -#define RISC_INST_ADD_CHECK(vec, inst) \ +#define RISC_INST_ADD_CHECK(_c, _inst) \ do { \ - if (!(inst)) { \ + if (!(_inst)) { \ scf_loge("\n"); \ return -ENOMEM; \ } \ - int ret = scf_vector_add((vec), (inst)); \ + int ret = scf_vector_add((_c)->instructions, (_inst)); \ if (ret < 0) { \ - scf_loge("\n"); \ - scf_instruction_free(inst); \ + scf_instruction_free(_inst); \ return ret; \ } \ + \ + (_inst)->c = (_c); \ } while (0) -#define RISC_RELA_ADD_CHECK(vec, rela, c, v, f) \ +#define RISC_RELA_ADD_CHECK(_vec, _rela, _c, _v, _f) \ do { \ - rela = calloc(1, sizeof(scf_rela_t)); \ - if (!rela) \ + (_rela) = calloc(1, sizeof(scf_rela_t)); \ + if (!(_rela)) \ return -ENOMEM; \ + (_rela)->var = (_v); \ + (_rela)->func = (_f); \ + (_rela)->inst = (_c)->instructions->data[(_c)->instructions->size - 1]; \ + (_rela)->addend = 0; \ \ - (rela)->code = (c); \ - (rela)->var = (v); \ - (rela)->func = (f); \ - (rela)->inst = (c)->instructions->data[(c)->instructions->size - 1]; \ - (rela)->addend = 0; \ - \ - int ret = scf_vector_add((vec), (rela)); \ + int ret = scf_vector_add((_vec), (_rela)); \ if (ret < 0) { \ - scf_rela_free(rela); \ + scf_rela_free(_rela); \ return ret; \ } \ + \ + (_rela)->inst->rel = (_rela); \ } while (0) -#define RISC_RELA_ADD_LABEL(vec, rela, _inst, _label) \ +#define RISC_RELA_ADD_LABEL(_vec, _rela, _inst, _label) \ do { \ - rela = calloc(1, sizeof(scf_rela_t)); \ - if (!rela) \ + (_rela) = calloc(1, sizeof(scf_rela_t)); \ + if (!(_rela)) \ return -ENOMEM; \ \ - (rela)->inst = (_inst); \ - (rela)->name = scf_string_clone(_label); \ - if (!(rela)->name) { \ - scf_loge("\n"); \ - scf_rela_free(rela); \ + (_rela)->inst = (_inst); \ + (_rela)->name = scf_string_clone(_label); \ + if (!(_rela)->name) { \ + scf_rela_free(_rela); \ return -ENOMEM; \ } \ - int ret = scf_vector_add((vec), (rela)); \ + \ + int ret = scf_vector_add((_vec), (_rela)); \ if (ret < 0) { \ - scf_loge("\n"); \ - scf_rela_free(rela); \ + scf_rela_free(_rela); \ return ret; \ } \ + \ + (_rela)->inst->rel = (_rela); \ } while (0) #endif diff --git a/native/risc/scf_risc_reg.c b/native/risc/scf_risc_reg.c index 23383a9..2f75ea9 100644 --- a/native/risc/scf_risc_reg.c +++ b/native/risc/scf_risc_reg.c @@ -472,7 +472,7 @@ int risc_array_index_reg(scf_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* i if (scf_variable_signed(index->var)) { inst = f->iops->MOVSX(c, ri, ri, ri->bytes); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } ri = ri2; @@ -494,7 +494,7 @@ int risc_array_index_reg(scf_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* i return ret; inst = f->iops->MUL(c, rs, rs, ri); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); ri = rs; s = 1; @@ -523,7 +523,7 @@ int risc_array_index_reg(scf_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* i inst = f->iops->ADD_G(c, rs, rs, rb); } - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { assert(1 == s); @@ -546,7 +546,7 @@ int risc_array_index_reg(scf_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* i inst = f->iops->ADD_G(c, rs, rb, rd); } - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); ri = NULL; } diff --git a/native/risc/scf_risc_reg_arm32.c b/native/risc/scf_risc_reg_arm32.c index ef69b29..d7499ec 100644 --- a/native/risc/scf_risc_reg_arm32.c +++ b/native/risc/scf_risc_reg_arm32.c @@ -471,7 +471,7 @@ int arm32_caller_save_regs(scf_3ac_code_t* c, scf_function_t* f, uint32_t* regs, return ret; } else { inst = f->iops->PUSH(NULL, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } saved_regs[k++] = r2; @@ -488,7 +488,7 @@ int arm32_caller_save_regs(scf_3ac_code_t* c, scf_function_t* f, uint32_t* regs, } else { inst = f->iops->PUSH(NULL, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } saved_regs[k++] = r2; @@ -548,10 +548,10 @@ int arm32_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs, if (i == nb_updated) { inst = f->iops->POP(c, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { inst = f->iops->ADD_IMM(c, f, sp, sp, 4); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } } return 0; @@ -1104,7 +1104,7 @@ int arm32_push_callee_regs(scf_3ac_code_t* c, scf_function_t* f) if (j < N) { inst = f->iops->PUSH(NULL, r); - RISC_INST_ADD_CHECK(f->init_code->instructions, inst); + RISC_INST_ADD_CHECK(f->init_code, inst); f->init_code_bytes += inst->len; } @@ -1137,7 +1137,7 @@ int arm32_pop_callee_regs(scf_3ac_code_t* c, scf_function_t* f) if (j < N) { inst = f->iops->POP(c, r); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } } diff --git a/native/risc/scf_risc_reg_arm64.c b/native/risc/scf_risc_reg_arm64.c index 158b409..6fa6d9d 100644 --- a/native/risc/scf_risc_reg_arm64.c +++ b/native/risc/scf_risc_reg_arm64.c @@ -556,7 +556,7 @@ int arm64_caller_save_regs(scf_3ac_code_t* c, scf_function_t* f, uint32_t* regs, return ret; } else { inst = f->iops->PUSH(NULL, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } saved_regs[k++] = r2; @@ -572,7 +572,7 @@ int arm64_caller_save_regs(scf_3ac_code_t* c, scf_function_t* f, uint32_t* regs, return ret; } else { inst = f->iops->PUSH(NULL, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } saved_regs[k++] = r2; @@ -633,10 +633,10 @@ int arm64_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs, if (i == nb_updated) { inst = f->iops->POP(c, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { inst = f->iops->ADD_IMM(c, f, sp, sp, 8); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } } return 0; @@ -1069,7 +1069,7 @@ int arm64_push_callee_regs(scf_3ac_code_t* c, scf_function_t* f) } inst = f->iops->PUSH(NULL, r); - RISC_INST_ADD_CHECK(f->init_code->instructions, inst); + RISC_INST_ADD_CHECK(f->init_code, inst); f->init_code_bytes += inst->len; } @@ -1095,7 +1095,7 @@ int arm64_pop_callee_regs(scf_3ac_code_t* c, scf_function_t* f) } inst = f->iops->POP(c, r); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } return 0; diff --git a/native/risc/scf_risc_reg_naja.c b/native/risc/scf_risc_reg_naja.c index 6a9ca31..fa795a5 100644 --- a/native/risc/scf_risc_reg_naja.c +++ b/native/risc/scf_risc_reg_naja.c @@ -183,7 +183,7 @@ int naja_caller_save_regs(scf_3ac_code_t* c, scf_function_t* f, uint32_t* regs, return ret; } else { inst = f->iops->PUSH(NULL, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } saved_regs[k++] = r2; @@ -199,7 +199,7 @@ int naja_caller_save_regs(scf_3ac_code_t* c, scf_function_t* f, uint32_t* regs, return ret; } else { inst = f->iops->PUSH(NULL, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } saved_regs[k++] = r2; @@ -260,10 +260,10 @@ int naja_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs, i if (i == nb_updated) { inst = f->iops->POP(c, r2); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } else { inst = f->iops->ADD_IMM(c, f, sp, sp, 8); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } } return 0; @@ -697,7 +697,7 @@ int naja_push_callee_regs(scf_3ac_code_t* c, scf_function_t* f) } inst = f->iops->PUSH(NULL, r); - RISC_INST_ADD_CHECK(f->init_code->instructions, inst); + RISC_INST_ADD_CHECK(f->init_code, inst); f->init_code_bytes += inst->len; } @@ -725,7 +725,7 @@ int naja_pop_callee_regs(scf_3ac_code_t* c, scf_function_t* f) } inst = f->iops->POP(c, r); - RISC_INST_ADD_CHECK(c->instructions, inst); + RISC_INST_ADD_CHECK(c, inst); } return 0; diff --git a/native/scf_instruction.c b/native/scf_instruction.c index 935d899..fc9e4e1 100644 --- a/native/scf_instruction.c +++ b/native/scf_instruction.c @@ -6,6 +6,7 @@ void scf_rela_free(scf_rela_t* rela) if (rela->name) scf_string_free(rela->name); + rela->inst->rel = NULL; free(rela); } } @@ -19,13 +20,14 @@ void scf_instruction_free(scf_instruction_t* inst) if (inst->bin) scf_string_free(inst->bin); + inst->rel = NULL; free(inst); } } void scf_inst_data_print(scf_inst_data_t* id) { - if (1 == id->flag) { + if (1 == id->mem_flag) { if (id->index) printf("%d(%s, %s, %d)", id->disp, id->base->name, id->index->name, id->scale); diff --git a/native/scf_instruction.h b/native/scf_instruction.h index f8cd59f..004018e 100644 --- a/native/scf_instruction.h +++ b/native/scf_instruction.h @@ -5,6 +5,7 @@ #include"scf_core_types.h" typedef struct scf_instruction_s scf_instruction_t; +typedef struct scf_rela_s scf_rela_t; struct scf_register_s { @@ -46,13 +47,15 @@ typedef struct { uint64_t imm; int imm_size; - uint8_t flag; + uint8_t mem_flag:1; } scf_inst_data_t; struct scf_instruction_s { scf_3ac_code_t* c; + scf_rela_t* rel; + scf_OpCode_t* OpCode; scf_instruction_t* next; // only for jcc, jmp, call @@ -74,8 +77,8 @@ struct scf_instruction_s int nb_used; }; -typedef struct { - scf_3ac_code_t* code; // related 3ac code +struct scf_rela_s +{ scf_function_t* func; scf_variable_t* var; scf_string_t* name; @@ -85,25 +88,25 @@ typedef struct { int64_t text_offset; // byte offset in .text segment uint64_t type; int addend; -} scf_rela_t; +}; static inline int scf_inst_data_empty(scf_inst_data_t* id) { - return !(id->flag || id->base || id->imm_size); + return !(id->mem_flag || id->base || id->imm_size); } static inline int scf_inst_data_same(scf_inst_data_t* id0, scf_inst_data_t* id1) { // global var, are considered as different. - if ((id0->flag && !id0->base) || (id1->flag && !id1->base)) + if ((id0->mem_flag && !id0->base) || (id1->mem_flag && !id1->base)) return 0; if (id0->scale == id1->scale && id0->disp == id1->disp - && id0->flag == id1->flag && id0->imm == id1->imm - && id0->imm_size == id1->imm_size) { + && id0->imm_size == id1->imm_size + && id0->mem_flag == id1->mem_flag) { if (id0->base == id1->base || (id0->base && id1->base && SCF_COLOR_CONFLICT(id0->base->color, id1->base->color))) { diff --git a/native/x64/scf_x64.c b/native/x64/scf_x64.c index 300b9dc..903fa68 100644 --- a/native/x64/scf_x64.c +++ b/native/x64/scf_x64.c @@ -159,7 +159,7 @@ static int _x64_save_rabi(scf_function_t* f) #define X64_SAVE_RABI(offset, rabi) \ do { \ inst = x64_make_inst_G2P(mov, rbp, offset, rabi); \ - X64_INST_ADD_CHECK(f->init_code->instructions, inst, NULL); \ + X64_INST_ADD_CHECK(f->init_code, inst, NULL); \ f->init_code_bytes += inst->len; \ } while (0) @@ -234,42 +234,49 @@ static int _x64_function_finish(scf_function_t* f) if (err < 0) return err; + uint32_t local = f->bp_used_flag ? f->local_vars_size : 0; + + if ((f->callee_saved_size + local) & 0xf) + local += 8; + + scf_logd("### local: %#x, local_vars_size: %#x, callee_saved_size: %#x\n", + local, f->local_vars_size, f->callee_saved_size); + if (f->bp_used_flag || f->vla_flag || f->call_flag) { - inst = x64_make_inst_G2E(mov, rsp, rbp); - X64_INST_ADD_CHECK(end->instructions, inst, NULL); - end->inst_bytes += inst->len; - bb ->code_bytes += inst->len; + if (f->bp_used_flag || f->vla_flag) { + inst = x64_make_inst_G2E(mov, rsp, rbp); + X64_INST_ADD_CHECK(end, inst, NULL); + end->inst_bytes += inst->len; + bb ->code_bytes += inst->len; + } inst = x64_make_inst_G(pop, rbp); - X64_INST_ADD_CHECK(end->instructions, inst, NULL); + X64_INST_ADD_CHECK(end, inst, NULL); end->inst_bytes += inst->len; bb ->code_bytes += inst->len; } f->init_code_bytes = 0; - uint32_t local = f->bp_used_flag ? f->local_vars_size : 0; if (f->bp_used_flag || f->vla_flag || f->call_flag) { inst = x64_make_inst_G(push, rbp); - X64_INST_ADD_CHECK(f->init_code->instructions, inst, NULL); - f->init_code_bytes += inst->len; - - inst = x64_make_inst_G2E(mov, rbp, rsp); - X64_INST_ADD_CHECK(f->init_code->instructions, inst, NULL); + X64_INST_ADD_CHECK(f->init_code, inst, NULL); f->init_code_bytes += inst->len; - if ((f->callee_saved_size + local) & 0xf) - local += 8; - - scf_logd("### local: %#x, local_vars_size: %#x, callee_saved_size: %#x\n", - local, f->local_vars_size, f->callee_saved_size); + if (f->bp_used_flag || f->vla_flag) { + inst = x64_make_inst_G2E(mov, rbp, rsp); + X64_INST_ADD_CHECK(f->init_code, inst, NULL); + f->init_code_bytes += inst->len; + } - inst = x64_make_inst_I2E(sub, rsp, (uint8_t*)&local, 4); - X64_INST_ADD_CHECK(f->init_code->instructions, inst, NULL); - f->init_code_bytes += inst->len; + if (local > 0) { + inst = x64_make_inst_I2E(sub, rsp, (uint8_t*)&local, 4); + X64_INST_ADD_CHECK(f->init_code, inst, NULL); + f->init_code_bytes += inst->len; + } err = _x64_save_rabi(f); if (err < 0) @@ -281,7 +288,7 @@ static int _x64_function_finish(scf_function_t* f) return err; inst = x64_make_inst(ret, 8); - X64_INST_ADD_CHECK(end->instructions, inst, NULL); + X64_INST_ADD_CHECK(end, inst, NULL); end->inst_bytes += inst->len; bb ->code_bytes += inst->len; @@ -731,8 +738,8 @@ static void _x64_set_offset_for_relas(scf_native_t* ctx, scf_function_t* f, scf_ for (i = 0; i < relas->size; i++) { scf_rela_t* rela = relas->data[i]; - scf_3ac_code_t* c = rela->code; scf_instruction_t* inst = rela->inst; + scf_3ac_code_t* c = inst->c; scf_basic_block_t* cur_bb = c->basic_block; scf_instruction_t* inst2; diff --git a/native/x64/scf_x64_inst.c b/native/x64/scf_x64_inst.c index 9921814..89147f9 100644 --- a/native/x64/scf_x64_inst.c +++ b/native/x64/scf_x64_inst.c @@ -204,11 +204,11 @@ static int _x64_inst_call_argv(scf_3ac_code_t* c, scf_function_t* f) if (!rd) { if (movx) { inst = x64_make_inst_E2G(movx, rs, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } inst = x64_make_inst_G2P(mov, rsp, v->sp_offset, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); continue; } @@ -221,12 +221,12 @@ static int _x64_inst_call_argv(scf_3ac_code_t* c, scf_function_t* f) if (!X64_COLOR_CONFLICT(rd->color, rs->color)) { if (movx) { inst = x64_make_inst_E2G(movx, rs, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } rd = x64_find_register_color_bytes(rd->color, rs->bytes); inst = x64_make_inst_G2E(mov, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else if (movx) { inst = x64_make_inst_E2G(movx, rs, rs); @@ -240,7 +240,7 @@ static int _x64_inst_call_argv(scf_3ac_code_t* c, scf_function_t* f) } for (i = 0; i < nb_movx; i++) { - X64_INST_ADD_CHECK(c->instructions, inst_movx[i], NULL); + X64_INST_ADD_CHECK(c, inst_movx[i], NULL); } return nb_floats; @@ -399,7 +399,7 @@ static int _x64_call_update_dsts(scf_3ac_code_t* c, scf_function_t* f, scf_regis int valid = _x64_dst_reg_valid(rd, updated_regs, nb_updated, idx_int, nb_int); if (valid) { inst = x64_make_inst_G2E(mov, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); assert(nb_updated < max_updated); @@ -444,7 +444,7 @@ static int _x64_call_update_dsts(scf_3ac_code_t* c, scf_function_t* f, scf_regis scf_rela_t* rela = NULL; inst = x64_make_inst_G2M(&rela, mov, dn->var, NULL, rs); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dn->var, NULL); } } @@ -513,7 +513,7 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (stack_size > 0) { sub = x64_find_OpCode(SCF_X64_SUB, 4,4, SCF_X64_I2E); inst_rsp = x64_make_inst_I2E(sub, rsp, (uint8_t*)&stack_size, 4); - X64_INST_ADD_CHECK(c->instructions, inst_rsp, NULL); + X64_INST_ADD_CHECK(c, inst_rsp, NULL); } ret = _x64_inst_call_argv(c, f); @@ -525,7 +525,7 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) mov = x64_find_OpCode(SCF_X64_MOV, 4,4, SCF_X64_I2G); inst = x64_make_inst_I2G(mov, eax, (uint8_t*)&imm, sizeof(imm)); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); scf_register_t* saved_regs[X64_ABI_CALLER_SAVES_NB]; scf_register_t* drop_regs [X64_ABI_CALLER_SAVES_NB]; @@ -549,7 +549,7 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) int32_t offset = 0; call = x64_find_OpCode(SCF_X64_CALL, 4,4, SCF_X64_I); inst = x64_make_inst_I(call, (uint8_t*)&offset, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst->OpCode = (scf_OpCode_t*)call; @@ -575,14 +575,14 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) } inst = x64_make_inst_E(call, r_pf); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst->OpCode = (scf_OpCode_t*)call; } else { scf_rela_t* rela = NULL; inst = x64_make_inst_M(&rela, call, var_pf, NULL); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->text_relas, rela, c, NULL, pf); inst->OpCode = (scf_OpCode_t*)call; @@ -592,7 +592,7 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (stack_size > 0) { add = x64_find_OpCode(SCF_X64_ADD, 4, 4, SCF_X64_I2E); inst = x64_make_inst_I2E(add, rsp, (uint8_t*)&stack_size, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } x64_drop_regs(drop_regs, n_drops); @@ -610,7 +610,7 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c) } if (save_size > 0) { - ret = x64_pop_regs(c->instructions, saved_regs, save_size >> 3, updated_regs, nb_updated); + ret = x64_pop_regs(c, saved_regs, save_size >> 3, updated_regs, nb_updated); if (ret < 0) { scf_loge("\n"); return ret; @@ -665,12 +665,12 @@ static int _x64_inst_unary(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type if (dst->dag_node->color > 0) { X64_SELECT_REG_CHECK(&rd, dst->dag_node, c, f, 0); inst = x64_make_inst_E(OpCode, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { scf_rela_t* rela = NULL; inst = x64_make_inst_M(&rela, OpCode, var, NULL); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, var, NULL); } @@ -708,7 +708,7 @@ static int _x64_inst_unary_assign(scf_native_t* ctx, scf_3ac_code_t* c, int OpCo if (src->dag_node->color > 0) { X64_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = x64_make_inst_E(OpCode, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else if (0 == src->dag_node->color) { scf_loge("\n"); @@ -717,7 +717,7 @@ static int _x64_inst_unary_assign(scf_native_t* ctx, scf_3ac_code_t* c, int OpCo scf_rela_t* rela = NULL; inst = x64_make_inst_M(&rela, OpCode, var, NULL); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, var, NULL); } @@ -776,13 +776,13 @@ static int _x64_inst_neg_handler(scf_native_t* ctx, scf_3ac_code_t* c) X64_SELECT_REG_CHECK(&rd, dst->dag_node, c, f, 0); inst = x64_make_inst_E2G(pxor, rd, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); if (src->dag_node->color > 0) { X64_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = x64_make_inst_E2G(sub, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { v = src->dag_node->var; @@ -795,7 +795,7 @@ static int _x64_inst_neg_handler(scf_native_t* ctx, scf_3ac_code_t* c) scf_rela_t* rela = NULL; inst = x64_make_inst_M2G(&rela, sub, rd, NULL, v); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); } @@ -850,7 +850,7 @@ static int _x64_inst_inc_float(scf_function_t* f, scf_3ac_code_t* c, int INC) X64_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = x64_make_inst_M2G(&rela, OpCode, rs, NULL, v1); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, v1, NULL); return 0; } @@ -902,12 +902,12 @@ static int _x64_inst_inc(scf_native_t* ctx, scf_3ac_code_t* c, int INC, int ADD) if (src->dag_node->color > 0) { X64_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = x64_make_inst_I2E(OpCode, rs, (uint8_t*)&v->data_size, imm_size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { scf_rela_t* rela = NULL; inst = x64_make_inst_I2M(&rela, OpCode, v, NULL, (uint8_t*)&v->data_size, imm_size); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); } @@ -915,12 +915,12 @@ static int _x64_inst_inc(scf_native_t* ctx, scf_3ac_code_t* c, int INC, int ADD) if (src->dag_node->color > 0) { X64_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = x64_make_inst_E(OpCode, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { scf_rela_t* rela = NULL; inst = x64_make_inst_M(&rela, OpCode, v, NULL); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); } } @@ -1016,7 +1016,7 @@ static int _x64_inst_assign_array_index(scf_native_t* ctx, scf_3ac_code_t* c, in else inst = x64_make_inst_I2P(OpCode, sib.base, sib.disp, (uint8_t*)&vs->data, size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -1042,10 +1042,10 @@ static int _x64_inst_assign_array_index(scf_native_t* ctx, scf_3ac_code_t* c, in if (sib.index) { inst = x64_make_inst_G2SIB(OpCode, sib.base, sib.index, sib.scale, sib.disp, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { inst = x64_make_inst_G2P(OpCode, sib.base, sib.disp, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } return 0; } @@ -1125,10 +1125,10 @@ static int _x64_inst_array_index(scf_native_t* ctx, scf_3ac_code_t* c, int lea_f if (sib.index) { inst = x64_make_inst_SIB2G(OpCode, rd, sib.base, sib.index, sib.scale, sib.disp); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { inst = x64_make_inst_P2G(OpCode, rd, sib.base, sib.disp); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } return 0; } @@ -1193,7 +1193,7 @@ static int _x64_inst_address_of_handler(scf_native_t* ctx, scf_3ac_code_t* c) lea = x64_find_OpCode(SCF_X64_LEA, 8,8, SCF_X64_E2G); inst = x64_make_inst_M2G(&rela, lea, rd, NULL, src->dag_node->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, src->dag_node->var, NULL); return 0; } @@ -1532,21 +1532,21 @@ static int _x64_inst_dump_handler(scf_native_t* ctx, scf_3ac_code_t* c) X64_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = x64_make_inst_G2E(mov, rsi, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); scf_rela_t* rela = NULL; inst = x64_make_inst_M2G(&rela, lea, rdi, NULL, msg->dag_node->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, msg->dag_node->var, NULL); inst = x64_make_inst_G2E(xor, rax, rax); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); // call printf() to show msg uint32_t imm = 0; inst = x64_make_inst_I(call, (uint8_t*)&imm, sizeof(imm)); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); rela = calloc(1, sizeof(scf_rela_t)); if (!rela) @@ -1555,10 +1555,10 @@ static int _x64_inst_dump_handler(scf_native_t* ctx, scf_3ac_code_t* c) X64_RELA_ADD_CHECK(f->text_relas, rela, c, NULL, logf->dag_node->var->func_ptr); inst = x64_make_inst_G2E(xor, rax, rax); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rax, 0, rax); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -1601,14 +1601,14 @@ static int _x64_inst_vla_alloc_handler(scf_native_t* ctx, scf_3ac_code_t* c) uint32_t imm = 0xf; inst = x64_make_inst_I2E(add, rs, (uint8_t*)&imm, sizeof(imm)); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); imm = ~0xf; inst = x64_make_inst_I2E(and, rs, (uint8_t*)&imm, sizeof(imm)); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_E2G(sub, rsp, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); int ret = x64_save_var(src->dag_node, c, f); if (ret < 0) @@ -1617,7 +1617,7 @@ static int _x64_inst_vla_alloc_handler(scf_native_t* ctx, scf_3ac_code_t* c) X64_SELECT_REG_CHECK(&rd, dst->dag_node, c, f, 0); inst = x64_make_inst_G2E(mov, rd, rsp); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -1651,10 +1651,10 @@ static int _x64_inst_vla_free_handler(scf_native_t* ctx, scf_3ac_code_t* c) X64_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); inst = x64_make_inst_E2G(add, rsp, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2E(xor, rs, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return x64_save_var(src->dag_node, c, f); } @@ -1755,14 +1755,14 @@ static int _x64_inst_return_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (rd->bytes > size) { inst = x64_make_inst_E2G(mov, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } else { X64_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1); if (!X64_COLOR_CONFLICT(rd->color, rs->color) || rd->bytes > size) { inst = x64_make_inst_E2G(mov, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } } else if (0 == src->dag_node->color) { @@ -1773,10 +1773,10 @@ static int _x64_inst_return_handler(scf_native_t* ctx, scf_3ac_code_t* c) mov = x64_find_OpCode(SCF_X64_MOV, rd->bytes, rd->bytes, SCF_X64_I2G); inst = x64_make_inst_I2G(mov, rd, (uint8_t*)&v->data, rd->bytes); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { inst = x64_make_inst_M2G(&rela, mov, rd, NULL, v); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); } } @@ -1828,7 +1828,7 @@ static int _x64_inst_memset_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (0 == dn->color) { \ mov = x64_find_OpCode(SCF_X64_MOV, size, size, SCF_X64_I2G); \ inst = x64_make_inst_I2G(mov, r, (uint8_t*)&dn->var->data, size); \ - X64_INST_ADD_CHECK(c->instructions, inst, NULL); \ + X64_INST_ADD_CHECK(c, inst, NULL); \ \ } else { \ if (dn->color < 0) \ @@ -1838,7 +1838,7 @@ static int _x64_inst_memset_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (!X64_COLOR_CONFLICT(rd->color, r->color)) { \ mov = x64_find_OpCode(SCF_X64_MOV, size, size, SCF_X64_G2E); \ inst = x64_make_inst_G2E(mov, r, rd); \ - X64_INST_ADD_CHECK(c->instructions, inst, NULL); \ + X64_INST_ADD_CHECK(c, inst, NULL); \ } \ } \ } while (0) @@ -1849,7 +1849,7 @@ static int _x64_inst_memset_handler(scf_native_t* ctx, scf_3ac_code_t* c) stos = x64_find_OpCode(SCF_X64_STOS, 1, 8, SCF_X64_G); inst = x64_make_inst(stos, 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -2093,13 +2093,13 @@ static int _x64_inst_push_rets_handler(scf_native_t* ctx, scf_3ac_code_t* c) r = x64_find_register_type_id_bytes(0, x64_abi_ret_regs[i], 8); inst = x64_make_inst_G(push, r); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } if (n & 0x1) { r = x64_find_register_type_id_bytes(0, x64_abi_ret_regs[n - 1], 8); inst = x64_make_inst_G(push, r); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } return 0; } @@ -2131,14 +2131,14 @@ static int _x64_inst_pop_rets_handler(scf_native_t* ctx, scf_3ac_code_t* c) if (n & 0x1) { r = x64_find_register_type_id_bytes(0, x64_abi_ret_regs[n - 1], 8); inst = x64_make_inst_G(pop, r); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } for (i = n - 1; i >= 0; i--) { r = x64_find_register_type_id_bytes(0, x64_abi_ret_regs[i], 8); inst = x64_make_inst_G(pop, r); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } return 0; @@ -2193,32 +2193,32 @@ static int _x64_inst_va_start_handler(scf_native_t* ctx, scf_3ac_code_t* c) X64_SELECT_REG_CHECK(&rptr, ptr->dag_node, c, f, 0); inst = x64_make_inst_P2G(lea, rptr, rbp, offset_int); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rap, 0, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_P2G(lea, rptr, rbp, offset_float); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rap, 8, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_P2G(lea, rptr, rbp, offset_others); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rap, 16, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); mov = x64_find_OpCode(SCF_X64_MOV, 4, 8, SCF_X64_I2E); inst = x64_make_inst_I2P(mov, rap, 24, (uint8_t*)&f->args_int, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_I2P(mov, rap, 32, (uint8_t*)&f->args_float, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -2257,22 +2257,22 @@ static int _x64_inst_va_end_handler(scf_native_t* ctx, scf_3ac_code_t* c) X64_SELECT_REG_CHECK(&rptr, ptr->dag_node, c, f, 0); inst = x64_make_inst_G2E(xor, rptr, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rap, 0, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rap, 8, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rap, 16, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rap, 24, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(mov, rap, 32, rptr); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); ptr->dag_node->var->tmp_flag = 0; ptr->dag_node->color = 0; @@ -2340,22 +2340,22 @@ static int _x64_inst_va_arg_handler(scf_native_t* ctx, scf_3ac_code_t* c) } inst = x64_make_inst_I2P(cmp, rap, idx_offset, (uint8_t*)&nints, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst_jge = x64_make_inst_I(jge, (uint8_t*)&offset, sizeof(offset)); - X64_INST_ADD_CHECK(c->instructions, inst_jge, NULL); + X64_INST_ADD_CHECK(c, inst_jge, NULL); inst = x64_make_inst_P2G(mov, rptr, rap, ptr_offset); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); offset += inst->len; inst = x64_make_inst_I2P(sub, rap, ptr_offset, (uint8_t*)&incptr, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); offset += inst->len; inst_jmp = x64_make_inst_I(jmp, (uint8_t*)&offset, sizeof(offset)); - X64_INST_ADD_CHECK(c->instructions, inst_jmp, NULL); + X64_INST_ADD_CHECK(c, inst_jmp, NULL); offset += inst_jmp->len; uint8_t* p = (uint8_t*)&offset; @@ -2365,18 +2365,18 @@ static int _x64_inst_va_arg_handler(scf_native_t* ctx, scf_3ac_code_t* c) offset = 0; inst = x64_make_inst_P2G(mov, rptr, rap, 16); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); offset += inst->len; inst = x64_make_inst_I2P(add, rap, 16, (uint8_t*)&incptr, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); offset += inst->len; for (i = 0; i < 4; i++) inst_jmp->code[jmp->nb_OpCodes + i] = p[i]; inst = x64_make_inst_P(inc, rap, idx_offset, 8); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); if (is_float) { if (4 == size) @@ -2389,7 +2389,7 @@ static int _x64_inst_va_arg_handler(scf_native_t* ctx, scf_3ac_code_t* c) mov2 = x64_find_OpCode(SCF_X64_MOV, size, size, SCF_X64_E2G); inst = x64_make_inst_P2G(mov2, rd, rptr, 0); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } diff --git a/native/x64/scf_x64_inst_binary.c b/native/x64/scf_x64_inst_binary.c index a292950..ec83545 100644 --- a/native/x64/scf_x64_inst_binary.c +++ b/native/x64/scf_x64_inst_binary.c @@ -41,11 +41,11 @@ static int _binary_assign_sib_float(scf_register_t* rb, scf_register_t* ri, int3 inst = x64_make_inst_SIB2G(mov, rs, rb, ri, scale, disp); else inst = x64_make_inst_P2G(mov, rs, rb, disp); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); OpCode = x64_find_OpCode(OpCode_type, v->size, v->size, SCF_X64_E2G); inst = x64_make_inst_M2G(&rela, OpCode, rs, NULL, src->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, src->var, NULL); end: @@ -54,7 +54,7 @@ end: inst = x64_make_inst_G2SIB(mov, rb, ri, scale, disp, rs); else inst = x64_make_inst_G2P(mov, rb, disp, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -82,7 +82,7 @@ static int _binary_assign_sib_int(x64_sib_t* sib, scf_dag_node_t* src, scf_3ac_c inst = x64_make_inst_I2SIB(OpCode, rb, ri, scale, disp, (uint8_t*)&v->data, dsize); else inst = x64_make_inst_I2P(OpCode, rb, disp, (uint8_t*)&v->data, dsize); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -108,7 +108,7 @@ static int _binary_assign_sib_int(x64_sib_t* sib, scf_dag_node_t* src, scf_3ac_c inst = x64_make_inst_G2SIB(OpCode, rb, ri, scale, disp, rs); else inst = x64_make_inst_G2P(OpCode, rb, disp, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -171,10 +171,10 @@ static int _binary_SIB2G(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type, if (sib.index) { inst = x64_make_inst_SIB2G(mov, rd, sib.base, sib.index, sib.scale, sib.disp); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { inst = x64_make_inst_P2G(mov, rd, sib.base, sib.disp); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } return 0; } @@ -332,19 +332,19 @@ int x64_assign_pointer(scf_native_t* ctx, scf_3ac_code_t* c) r = x64_find_register_color_bytes(rs->color, 8); inst = x64_make_inst_G(push, r); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_I2G(mov, rs, (uint8_t*)&mask, dsize); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); if (sib.index) inst = x64_make_inst_G2SIB(and, sib.base, sib.index, sib.scale, sib.disp, rs); else inst = x64_make_inst_G2P(and, sib.base, sib.disp, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G(pop, r); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); int imm = (rs->bytes << 3) - vm->bit_size; assert(imm > 0); @@ -353,14 +353,14 @@ int x64_assign_pointer(scf_native_t* ctx, scf_3ac_code_t* c) shr = x64_find_OpCode(SCF_X64_SHR, 1, rs->bytes, SCF_X64_I2E); inst = x64_make_inst_I2E(shl, rs, (uint8_t*)&imm, 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); imm -= vm->bit_offset; assert(imm >= 0); if (imm > 0) { inst = x64_make_inst_I2E(shr, rs, (uint8_t*)&imm, 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } mov = x64_find_OpCode(SCF_X64_OR, dsize, dsize, SCF_X64_G2E); @@ -375,7 +375,7 @@ int x64_assign_pointer(scf_native_t* ctx, scf_3ac_code_t* c) inst = x64_make_inst_G2SIB(mov, sib.base, sib.index, sib.scale, sib.disp, rs); else inst = x64_make_inst_G2P(mov, sib.base, sib.disp, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -452,10 +452,10 @@ int x64_inst_pointer(scf_native_t* ctx, scf_3ac_code_t* c, int lea_flag) if (sib.index) { inst = x64_make_inst_SIB2G(mov, rd, sib.base, sib.index, sib.scale, sib.disp); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { inst = x64_make_inst_P2G(mov, rd, sib.base, sib.disp); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } if (vm->bit_size > 0) { @@ -467,12 +467,12 @@ int x64_inst_pointer(scf_native_t* ctx, scf_3ac_code_t* c, int lea_flag) if (imm > 0) { inst = x64_make_inst_I2E(shl, rd, (uint8_t*)&imm, 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } imm += vm->bit_offset; inst = x64_make_inst_I2E(shr, rd, (uint8_t*)&imm, 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } return 0; diff --git a/native/x64/scf_x64_inst_cmp.c b/native/x64/scf_x64_inst_cmp.c index 55d8711..2230212 100644 --- a/native/x64/scf_x64_inst_cmp.c +++ b/native/x64/scf_x64_inst_cmp.c @@ -35,7 +35,7 @@ static int _inst_cmp(scf_dag_node_t* src0, scf_dag_node_t* src1, scf_3ac_code_t* X64_SELECT_REG_CHECK(&rs1, src1, c, f, 1); inst = x64_make_inst_E2G(cmp, rs0, rs1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } } else { @@ -44,7 +44,7 @@ static int _inst_cmp(scf_dag_node_t* src0, scf_dag_node_t* src1, scf_3ac_code_t* if (cmp) { inst = x64_make_inst_I2E(cmp, rs0, (uint8_t*)&src1->var->data, src1_size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -54,7 +54,7 @@ static int _inst_cmp(scf_dag_node_t* src0, scf_dag_node_t* src1, scf_3ac_code_t* cmp = x64_find_OpCode(SCF_X64_CMP, rs0->bytes, src1_size, SCF_X64_G2E); inst = x64_make_inst_G2E(cmp, rs0, rs1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); src1->loaded = 0; src1->color = 0; @@ -68,10 +68,10 @@ static int _inst_cmp(scf_dag_node_t* src0, scf_dag_node_t* src1, scf_3ac_code_t* if (src1->color > 0) { X64_SELECT_REG_CHECK(&rs1, src1, c, f, 1); inst = x64_make_inst_E2G(cmp, rs0, rs1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { inst = x64_make_inst_M2G(&rela, cmp, rs0, NULL, src1->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, src1->var, NULL); } @@ -98,13 +98,13 @@ static int _inst_set(int setcc_type, scf_dag_node_t* dst, scf_3ac_code_t* c, scf mov = x64_find_OpCode(SCF_X64_MOV, rd->bytes, rd->bytes, SCF_X64_I2G); inst = x64_make_inst_I2G(mov, rd, (uint8_t*)&imm, rd->bytes); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); rd = x64_find_register_color_bytes(rd->color, 1); } inst = x64_make_inst_E(setcc, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } @@ -141,7 +141,7 @@ int x64_inst_teq(scf_native_t* ctx, scf_3ac_code_t* c) test = x64_find_OpCode(SCF_X64_TEST, v->size, v->size, SCF_X64_G2E); inst = x64_make_inst_G2E(test, rs, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } diff --git a/native/x64/scf_x64_inst_common.c b/native/x64/scf_x64_inst_common.c index 1d9eba7..52e7b00 100644 --- a/native/x64/scf_x64_inst_common.c +++ b/native/x64/scf_x64_inst_common.c @@ -91,14 +91,14 @@ static int _x64_inst_op2_imm(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_ OpCode = x64_find_OpCode(OpCode_type, src_size, dst_size, SCF_X64_I2G); if (OpCode) { inst = x64_make_inst_I2G(OpCode, rd, (uint8_t*)&src->var->data, src_size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } OpCode = x64_find_OpCode(OpCode_type, src_size, dst_size, SCF_X64_I2E); if (OpCode) { inst = x64_make_inst_I2E(OpCode, rd, (uint8_t*)&src->var->data, src_size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } } @@ -114,7 +114,7 @@ static int _x64_inst_op2_imm(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_ X64_SELECT_REG_CHECK(&rs, src, c, f, 1); inst = x64_make_inst_G2E(OpCode, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); src->color = 0; src->loaded = 0; @@ -128,7 +128,7 @@ static int _x64_inst_op2_imm(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_ OpCode = x64_find_OpCode(OpCode_type, src_size, dst_size, SCF_X64_I2E); if (OpCode) { inst = x64_make_inst_I2M(&rela, OpCode, dst->var, NULL, (uint8_t*)&src->var->data, src_size); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); return 0; } @@ -145,7 +145,7 @@ static int _x64_inst_op2_imm(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_ X64_SELECT_REG_CHECK(&rs, src, c, f, 1); inst = x64_make_inst_G2M(&rela, OpCode, dst->var, NULL, rs); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); src->color = 0; @@ -202,7 +202,7 @@ int x64_inst_op2(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_t* src, scf_ OpCode = x64_find_OpCode(OpCode_type, src_size, dst_size, SCF_X64_G2E); if (OpCode) { inst = x64_make_inst_G2E(OpCode, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { OpCode = x64_find_OpCode(OpCode_type, src_size, dst_size, SCF_X64_E2G); if (!OpCode) { @@ -211,7 +211,7 @@ int x64_inst_op2(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_t* src, scf_ } inst = x64_make_inst_E2G(OpCode, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } else { OpCode = x64_find_OpCode(OpCode_type, src_size, dst_size, SCF_X64_E2G); @@ -221,7 +221,7 @@ int x64_inst_op2(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_t* src, scf_ } inst = x64_make_inst_M2G(&rela, OpCode, rd, NULL, src->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, src->var, NULL); } @@ -252,7 +252,7 @@ int x64_inst_movx(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c, s assert(4 == src->var->size); xor = x64_find_OpCode(SCF_X64_XOR, 8, 8, SCF_X64_G2E); inst = x64_make_inst_G2E(xor, rd, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); movx = x64_find_OpCode(SCF_X64_MOV, 4, 4, SCF_X64_E2G); } @@ -260,7 +260,7 @@ int x64_inst_movx(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c, s if (src->color > 0) { X64_SELECT_REG_CHECK(&rs, src, c, f, 0); inst = x64_make_inst_E2G(movx, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else if (0 == src->color) { // get the rd's low bits register @@ -268,16 +268,16 @@ int x64_inst_movx(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c, s mov = x64_find_OpCode(SCF_X64_MOV, src->var->size, src->var->size, SCF_X64_I2G); inst = x64_make_inst_I2G(mov, rs, (uint8_t*)&src->var->data, src->var->size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_E2G(movx, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { scf_rela_t* rela = NULL; inst = x64_make_inst_M2G(&rela, movx, rd, NULL, src->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, src->var, NULL); } @@ -329,18 +329,18 @@ int x64_inst_float_cast(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t X64_SELECT_REG_CHECK(&rs, src, c, f, 1); inst = x64_make_inst_E2G(OpCode, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else if (src->color > 0) { X64_SELECT_REG_CHECK(&rs, src, c, f, 1); inst = x64_make_inst_E2G(OpCode, rd, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { scf_rela_t* rela = NULL; inst = x64_make_inst_M2G(&rela, OpCode, rd, NULL, src->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, src->var, NULL); } @@ -369,6 +369,6 @@ int x64_inst_jmp(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type) scf_instruction_t* inst = x64_make_inst_I(jcc, (uint8_t*)&offset, sizeof(offset)); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } diff --git a/native/x64/scf_x64_inst_div.c b/native/x64/scf_x64_inst_div.c index 9de5722..eebb869 100644 --- a/native/x64/scf_x64_inst_div.c +++ b/native/x64/scf_x64_inst_div.c @@ -44,7 +44,7 @@ int x64_inst_int_div(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c mov = x64_find_OpCode(SCF_X64_MOV, size, size, SCF_X64_G2E); inst = x64_make_inst_G2E(mov, rl, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } if (rd->id != rh->id) { @@ -65,7 +65,7 @@ int x64_inst_int_div(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c mov = x64_find_OpCode(SCF_X64_MOV, size, size, SCF_X64_E2G); inst = x64_make_inst_M2G(&rela, mov, rl, NULL, dst->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); } @@ -73,23 +73,23 @@ int x64_inst_int_div(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c div = x64_find_OpCode(SCF_X64_IDIV, size, size, SCF_X64_E); cdq = x64_find_OpCode_by_type(SCF_X64_CDQ); inst = x64_make_inst(cdq, size << 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { div = x64_find_OpCode(SCF_X64_DIV, size, size, SCF_X64_E); xor = x64_find_OpCode(SCF_X64_XOR, size, size, SCF_X64_G2E); inst = x64_make_inst_G2E(xor, rh, rh); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } if (src->color > 0) { X64_SELECT_REG_CHECK(&rs, src, c, f, 1); inst = x64_make_inst_E(div, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { scf_rela_t* rela = NULL; inst = x64_make_inst_M(&rela, div, src->var, NULL); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, src->var, NULL); } @@ -103,14 +103,14 @@ int x64_inst_int_div(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c if (rd->id != result->id) { mov = x64_find_OpCode(SCF_X64_MOV, rd->bytes, rd->bytes, SCF_X64_G2E); inst = x64_make_inst_G2E(mov, rd, result); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } else { scf_rela_t* rela = NULL; mov = x64_find_OpCode(SCF_X64_MOV, dst->var->size, dst->var->size, SCF_X64_G2E); inst = x64_make_inst_G2M(&rela, mov, dst->var, NULL, result); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); } diff --git a/native/x64/scf_x64_inst_mul.c b/native/x64/scf_x64_inst_mul.c index 6e20ce8..7fcc0db 100644 --- a/native/x64/scf_x64_inst_mul.c +++ b/native/x64/scf_x64_inst_mul.c @@ -12,15 +12,15 @@ static int _int_mul_src(scf_x64_OpCode_t* mul, scf_register_t* rh, scf_dag_node_ mov = x64_find_OpCode(SCF_X64_MOV, size, size, SCF_X64_I2G); inst = x64_make_inst_I2G(mov, rh, (uint8_t*)&src->var->data, size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_E(mul, rh); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { scf_rela_t* rela = NULL; inst = x64_make_inst_M(&rela, mul, src->var, NULL); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, src->var, NULL); } @@ -87,23 +87,23 @@ int x64_inst_int_mul(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c if (rd->id == rl->id) { inst = x64_make_inst_E(mul, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else if (rs->id == rl->id) { inst = x64_make_inst_E(mul, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { inst = x64_make_inst_G2E(mov, rl, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_E(mul, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } else { if (rd->id != rl->id) { inst = x64_make_inst_G2E(mov, rl, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } int ret = _int_mul_src(mul, rh, src, c, f); @@ -116,18 +116,18 @@ int x64_inst_int_mul(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c if (rs->id != rl->id) { inst = x64_make_inst_G2E(mov, rl, rs); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } inst = x64_make_inst_M(&rela, mul, dst->var, NULL); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); } else { mov2 = x64_find_OpCode(SCF_X64_MOV, size, size, SCF_X64_E2G); inst = x64_make_inst_M2G(&rela, mov2, rl, NULL, dst->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); int ret = _int_mul_src(mul, rh, src, c, f); @@ -139,11 +139,11 @@ int x64_inst_int_mul(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c if (rd) { if (rd->id != rl->id) { inst = x64_make_inst_G2E(mov, rd, rl); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } else { inst = x64_make_inst_G2M(&rela, mov, dst->var, NULL, rl); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); } diff --git a/native/x64/scf_x64_inst_shift.c b/native/x64/scf_x64_inst_shift.c index 855ad92..9444828 100644 --- a/native/x64/scf_x64_inst_shift.c +++ b/native/x64/scf_x64_inst_shift.c @@ -25,7 +25,7 @@ static int _shift_count(scf_dag_node_t* count, scf_3ac_code_t* c, scf_function_t mov = x64_find_OpCode(SCF_X64_MOV, 1, 1, SCF_X64_G2E); inst = x64_make_inst_G2E(mov, cl, rc); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } else if (count->color < 0) { ret = x64_overflow_reg(cl, c, f); @@ -38,7 +38,7 @@ static int _shift_count(scf_dag_node_t* count, scf_3ac_code_t* c, scf_function_t mov = x64_find_OpCode(SCF_X64_MOV, 1, 1, SCF_X64_E2G); inst = x64_make_inst_M2G(&rela, mov, cl, NULL, count->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, count->var, NULL); } @@ -76,11 +76,11 @@ static int _x64_shift(scf_native_t* ctx, scf_3ac_code_t* c, scf_dag_node_t* dst, if (0 != count->color) { shift = x64_find_OpCode(OpCode_type, 1, dst->var->size, SCF_X64_G2E); inst = x64_make_inst_E(shift, rd); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { shift = x64_find_OpCode(OpCode_type, 1, dst->var->size, SCF_X64_I2E); inst = x64_make_inst_I2E(shift, rd, (uint8_t*)&count->var->data, 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } else { scf_rela_t* rela = NULL; @@ -88,12 +88,12 @@ static int _x64_shift(scf_native_t* ctx, scf_3ac_code_t* c, scf_dag_node_t* dst, if (0 != count->color) { shift = x64_find_OpCode(OpCode_type, 1, dst->var->size, SCF_X64_G2E); inst = x64_make_inst_M(&rela, shift, dst->var, NULL); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); } else { shift = x64_find_OpCode(OpCode_type, 1, dst->var->size, SCF_X64_I2E); inst = x64_make_inst_I2M(&rela, shift, dst->var, NULL, (uint8_t*)&count->var->data, 1); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dst->var, NULL); } } diff --git a/native/x64/scf_x64_inst_unary.c b/native/x64/scf_x64_inst_unary.c index 8ee5358..260463e 100644 --- a/native/x64/scf_x64_inst_unary.c +++ b/native/x64/scf_x64_inst_unary.c @@ -15,7 +15,7 @@ static int _unary_assign_sib(x64_sib_t* sib, int size, scf_3ac_code_t* c, scf_fu inst = x64_make_inst_SIB(OpCode, sib->base, sib->index, sib->scale, sib->disp, size); else inst = x64_make_inst_P(OpCode, sib->base, sib->disp, size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); return 0; } diff --git a/native/x64/scf_x64_inst_util.c b/native/x64/scf_x64_inst_util.c index 1c3f461..d475604 100644 --- a/native/x64/scf_x64_inst_util.c +++ b/native/x64/scf_x64_inst_util.c @@ -345,11 +345,11 @@ scf_instruction_t* x64_make_inst_L(scf_rela_t** prela, scf_x64_OpCode_t* OpCode) inst->src.base = NULL; inst->src.disp = 0; - inst->src.flag = 1; + inst->src.mem_flag = 1; inst->dst.base = NULL; inst->dst.disp = 0; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; } else if (SCF_X64_MUL == OpCode->type || SCF_X64_DIV == OpCode->type @@ -359,7 +359,7 @@ scf_instruction_t* x64_make_inst_L(scf_rela_t** prela, scf_x64_OpCode_t* OpCode) inst->src.base = NULL; inst->src.disp = 0; - inst->src.flag = 1; + inst->src.mem_flag = 1; } return inst; @@ -412,11 +412,11 @@ scf_instruction_t* x64_make_inst_M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, inst->src.base = r_base; inst->src.disp = offset; - inst->src.flag = 1; + inst->src.mem_flag = 1; inst->dst.base = r_base; inst->dst.disp = offset; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; } else if (SCF_X64_MUL == OpCode->type || SCF_X64_DIV == OpCode->type @@ -426,7 +426,7 @@ scf_instruction_t* x64_make_inst_M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, inst->src.base = r_base; inst->src.disp = offset; - inst->src.flag = 1; + inst->src.mem_flag = 1; } return inst; @@ -462,7 +462,7 @@ scf_instruction_t* x64_make_inst_I2L(scf_rela_t** prela, scf_x64_OpCode_t* OpCod inst->dst.base = NULL; inst->dst.disp = 0; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; inst->src.imm_size = size; return inst; @@ -525,7 +525,7 @@ scf_instruction_t* x64_make_inst_I2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCod inst->dst.base = r_base; inst->dst.disp = offset; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; inst->src.imm_size = size; return inst; @@ -550,7 +550,7 @@ scf_instruction_t* x64_make_inst_G2L(scf_rela_t** prela, scf_x64_OpCode_t* OpCod inst->src.base = r_src; inst->dst.base = NULL; inst->dst.disp = 0; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; return inst; } @@ -604,7 +604,7 @@ scf_instruction_t* x64_make_inst_G2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCod inst->src.base = r_src; inst->dst.base = r_base; inst->dst.disp = offset; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; return inst; } @@ -628,7 +628,7 @@ scf_instruction_t* x64_make_inst_L2G(scf_rela_t** prela, scf_x64_OpCode_t* OpCod inst->dst.base = r_dst; inst->src.base = NULL; inst->src.disp = 0; - inst->src.flag = 1; + inst->src.mem_flag = 1; return inst; } @@ -681,7 +681,7 @@ scf_instruction_t* x64_make_inst_M2G(scf_rela_t** prela, scf_x64_OpCode_t* OpCod inst->dst.base = r_dst; inst->src.base = r_base; inst->src.disp = offset; - inst->src.flag = 1; + inst->src.mem_flag = 1; return inst; } @@ -716,7 +716,7 @@ scf_instruction_t* x64_make_inst_P2G(scf_x64_OpCode_t* OpCode, scf_register_t* r inst->dst.base = r_dst; inst->src.base = r_base; inst->src.disp = offset; - inst->src.flag = 1; + inst->src.mem_flag = 1; return inst; } @@ -751,7 +751,7 @@ scf_instruction_t* x64_make_inst_G2P(scf_x64_OpCode_t* OpCode, scf_register_t* r inst->src.base = r_src; inst->dst.base = r_base; inst->dst.disp = offset; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; return inst; } @@ -795,7 +795,7 @@ scf_instruction_t* x64_make_inst_I2P(scf_x64_OpCode_t* OpCode, scf_register_t* r inst->dst.base = r_base; inst->dst.disp = offset; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; return inst; } @@ -939,7 +939,7 @@ scf_instruction_t* x64_make_inst_SIB2G(scf_x64_OpCode_t* OpCode, scf_register_t* inst->src.index = r_index; inst->src.scale = scale; inst->src.disp = disp; - inst->src.flag = 1; + inst->src.mem_flag = 1; return _x64_make_inst_SIB(inst, OpCode, r_dst->id, r_base, r_index, scale, disp, r_dst->bytes); } @@ -961,7 +961,7 @@ scf_instruction_t* x64_make_inst_G2SIB(scf_x64_OpCode_t* OpCode, scf_register_t* inst->dst.index = r_index; inst->dst.scale = scale; inst->dst.disp = disp; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; return _x64_make_inst_SIB(inst, OpCode, r_src->id, r_base, r_index, scale, disp, r_src->bytes); } @@ -996,7 +996,7 @@ scf_instruction_t* x64_make_inst_I2SIB(scf_x64_OpCode_t* OpCode, scf_register_t* inst->dst.index = r_index; inst->dst.scale = scale; inst->dst.disp = disp; - inst->dst.flag = 1; + inst->dst.mem_flag = 1; return inst; } diff --git a/native/x64/scf_x64_opcode.h b/native/x64/scf_x64_opcode.h index 0e45f98..1abe401 100644 --- a/native/x64/scf_x64_opcode.h +++ b/native/x64/scf_x64_opcode.h @@ -61,57 +61,60 @@ scf_instruction_t* x64_make_inst_I2L(scf_rela_t** prela, scf_x64_OpCode_t* OpCo scf_instruction_t* x64_make_inst_G2L(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_register_t* r_src); scf_instruction_t* x64_make_inst_L2G(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_register_t* r_dst); -#define X64_INST_ADD_CHECK(vec, inst, rela) \ +#define X64_INST_ADD_CHECK(_c, _inst, _rela) \ do { \ - if (!(inst)) { \ + if (!(_inst)) { \ scf_loge("\n"); \ return -ENOMEM; \ } \ - int ret = scf_vector_add((vec), (inst)); \ + int ret = scf_vector_add((_c)->instructions, (_inst)); \ if (ret < 0) { \ - scf_loge("\n"); \ - scf_instruction_free(inst); \ - scf_rela_free(rela); \ + scf_instruction_free(_inst); \ + scf_rela_free(_rela); \ return ret; \ } \ + \ + (_inst)->c = (_c); \ } while (0) -#define X64_RELA_ADD_CHECK(vec, rela, c, v, f) \ +#define X64_RELA_ADD_CHECK(_vec, _rela, _c, _v, _f) \ do { \ - if (rela) { \ - (rela)->code = (c); \ - (rela)->var = (v); \ - (rela)->func = (f); \ - (rela)->inst = (c)->instructions->data[(c)->instructions->size - 1]; \ - (rela)->addend = -4; \ - (rela)->type = R_X86_64_PC32; \ - int ret = scf_vector_add((vec), (rela)); \ + if (_rela) { \ + (_rela)->var = (_v); \ + (_rela)->func = (_f); \ + (_rela)->inst = (_c)->instructions->data[(_c)->instructions->size - 1]; \ + (_rela)->addend = -4; \ + (_rela)->type = R_X86_64_PC32; \ + \ + int ret = scf_vector_add((_vec), (_rela)); \ if (ret < 0) { \ - scf_loge("\n"); \ - scf_rela_free(rela); \ + scf_rela_free(_rela); \ return ret; \ } \ + \ + (_rela)->inst->rel = (_rela); \ } \ } while (0) -#define X64_RELA_ADD_LABEL(vec, rela, _inst, _label) \ +#define X64_RELA_ADD_LABEL(_vec, _rela, _inst, _label) \ do { \ - if (rela) { \ - (rela)->inst = (_inst); \ - (rela)->addend = -4; \ - (rela)->type = R_X86_64_PC32; \ - (rela)->name = scf_string_clone(_label); \ - if (!(rela)->name) { \ - scf_loge("\n"); \ - scf_rela_free(rela); \ + if (_rela) { \ + (_rela)->inst = (_inst); \ + (_rela)->addend = -4; \ + (_rela)->type = R_X86_64_PC32; \ + (_rela)->name = scf_string_clone(_label); \ + if (!(_rela)->name) { \ + scf_rela_free(_rela); \ return -ENOMEM; \ } \ - int ret = scf_vector_add((vec), (rela)); \ + \ + int ret = scf_vector_add((_vec), (_rela)); \ if (ret < 0) { \ - scf_loge("\n"); \ - scf_rela_free(rela); \ + scf_rela_free(_rela); \ return ret; \ } \ + \ + (_rela)->inst->rel = (_rela); \ } \ } while (0) diff --git a/native/x64/scf_x64_peephole.c b/native/x64/scf_x64_peephole.c index 147a303..cb3d512 100644 --- a/native/x64/scf_x64_peephole.c +++ b/native/x64/scf_x64_peephole.c @@ -3,6 +3,127 @@ #include"scf_basic_block.h" #include"scf_3ac.h" +static int __x64_peep_mov_by_lea(scf_instruction_t* mov, scf_instruction_t* lea) +{ + scf_instruction_t* inst; + + if (lea->src.index) + inst = x64_make_inst_SIB2G((scf_x64_OpCode_t*)lea->OpCode, + mov->dst.base, + lea->src.base, lea->src.index, lea->src.scale, lea->src.disp); + else + inst = x64_make_inst_P2G((scf_x64_OpCode_t*)lea->OpCode, mov->dst.base, lea->src.base, lea->src.disp); + + if (!inst) + return -ENOMEM; + + memcpy(mov->code, inst->code, inst->len); + mov->len = inst->len; + + mov->OpCode = lea->OpCode; + mov->src.base = lea->src.base; + mov->src.index = lea->src.index; + mov->src.scale = lea->src.scale; + mov->src.disp = lea->src.disp; + mov->src.mem_flag = lea->src.mem_flag; + + free(inst); + return 0; +} + +static int __x64_peep_src_was_mem(scf_instruction_t* inst, scf_inst_data_t* src) +{ + scf_instruction_t* tmp; + scf_x64_OpCode_t* OpCode; + + if (src->base) + tmp = x64_make_inst_E2G((scf_x64_OpCode_t*)inst->OpCode, inst->dst.base, src->base); + else { + int bytes = inst->dst.base->bytes; + + if (src->imm_size < bytes) + src->imm = scf_zero_extend(src->imm, src->imm_size); + + OpCode = x64_find_OpCode(inst->OpCode->type, bytes, bytes, SCF_X64_I2G); + if (!OpCode) { + OpCode = x64_find_OpCode(inst->OpCode->type, bytes, bytes, SCF_X64_I2E); + + if (!OpCode) + return -EINVAL; + + tmp = x64_make_inst_I2E(OpCode, inst->dst.base, (uint8_t*)&src->imm, bytes); + } else + tmp = x64_make_inst_I2G(OpCode, inst->dst.base, (uint8_t*)&src->imm, bytes); + } + if (!tmp) + return -ENOMEM; + + memcpy(inst->code, tmp->code, tmp->len); + inst->len = tmp->len; + + inst->src.base = src->base; + inst->src.index = NULL; + inst->src.scale = 0; + inst->src.disp = 0; + inst->src.mem_flag = 0; + + free(tmp); + return 0; +} + +static int __x64_peep_dst_was_mem(scf_instruction_t* inst, scf_inst_data_t* dst) +{ + scf_instruction_t* tmp; + + if (inst->src.imm_size > 0) + tmp = x64_make_inst_I2E((scf_x64_OpCode_t*)inst->OpCode, dst->base, (uint8_t*)&inst->src.imm, inst->src.imm_size); + else + tmp = x64_make_inst_G2E((scf_x64_OpCode_t*)inst->OpCode, dst->base, inst->src.base); + if (!tmp) + return -ENOMEM; + + memcpy(inst->code, tmp->code, tmp->len); + inst->len = tmp->len; + + inst->dst.base = dst->base; + inst->dst.index = NULL; + inst->dst.scale = 0; + inst->dst.disp = 0; + inst->dst.mem_flag = 0; + + free(tmp); + return 0; +} + +static int __x64_peep_mov_to_mem(scf_instruction_t* mov, scf_inst_data_t* src) +{ + scf_instruction_t* inst; + + if (!mov->dst.index) + inst = x64_make_inst_G2P((scf_x64_OpCode_t*)mov->OpCode, + mov->dst.base, mov->dst.disp, + src->base); + else + inst = x64_make_inst_G2SIB((scf_x64_OpCode_t*)mov->OpCode, + mov->dst.base, + mov->dst.index, mov->dst.scale, mov->dst.disp, + src->base); + if (!inst) + return -ENOMEM; + + memcpy(mov->code, inst->code, inst->len); + mov->len = inst->len; + + mov->src.base = src->base; + mov->src.index = NULL; + mov->src.scale = 0; + mov->src.disp = 0; + mov->src.mem_flag = 0; + + free(inst); + return 0; +} + static int _x64_peephole_mov(scf_vector_t* save_insts, scf_vector_t* peep_insts, scf_instruction_t* inst) { scf_3ac_code_t* c = inst->c; @@ -17,43 +138,14 @@ static int _x64_peephole_mov(scf_vector_t* save_insts, scf_vector_t* peep_insts, int j; for (j = peep_insts->size - 1; j >= 0; j--) { std = peep_insts->data[j]; -#if 0 - scf_loge("std j: %d\n", j); - scf_3ac_code_print(std->c, NULL); - scf_instruction_print(std); - - scf_loge("inst: \n"); - scf_instruction_print(inst); - printf("\n"); -#endif + if (SCF_X64_LEA == std->OpCode->type) { if (scf_inst_data_same(&std->dst, &inst->src) && x64_inst_data_is_reg(&inst->dst) && x64_inst_data_is_local(&std->src)) { - if (std->src.index) - inst2 = x64_make_inst_SIB2G((scf_x64_OpCode_t*)std->OpCode, - inst->dst.base, - std->src.base, std->src.index, std->src.scale, std->src.disp); - else - inst2 = x64_make_inst_P2G((scf_x64_OpCode_t*)std->OpCode, inst->dst.base, std->src.base, std->src.disp); - - if (!inst2) - return -ENOMEM; - - memcpy(inst->code, inst2->code, inst2->len); - inst->len = inst2->len; - - inst->OpCode = std->OpCode; - inst->src.base = std->src.base; - inst->src.index = std->src.index; - inst->src.scale = std->src.scale; - inst->src.disp = std->src.disp; - inst->src.flag = std->src.flag; - - free(inst2); - inst2 = NULL; + __x64_peep_mov_by_lea(inst, std); } break; } @@ -83,23 +175,9 @@ static int _x64_peephole_mov(scf_vector_t* save_insts, scf_vector_t* peep_insts, } else if (scf_inst_data_same(&std->src, &inst->src)) { - if (std->src.flag && std->dst.base->bytes == inst->dst.base->bytes) { - - inst2 = x64_make_inst_E2G((scf_x64_OpCode_t*)inst->OpCode, inst->dst.base, std->dst.base); - if (!inst2) - return -ENOMEM; - - memcpy(inst->code, inst2->code, inst2->len); - inst->len = inst2->len; + if (std->src.mem_flag && std->dst.base->bytes == inst->dst.base->bytes) { - inst->src.base = std->dst.base; - inst->src.index = NULL; - inst->src.scale = 0; - inst->src.disp = 0; - inst->src.flag = 0; - - free(inst2); - inst2 = NULL; + __x64_peep_src_was_mem(inst, &std->dst); } continue; @@ -115,64 +193,18 @@ static int _x64_peephole_mov(scf_vector_t* save_insts, scf_vector_t* peep_insts, return X64_PEEPHOLE_DEL; } - if (inst->src.flag) { - assert(std->dst.flag); - - if (std->src.base) - inst2 = x64_make_inst_E2G((scf_x64_OpCode_t*)inst->OpCode, inst->dst.base, std->src.base); - else { - OpCode = x64_find_OpCode(inst->OpCode->type, inst->dst.base->bytes, inst->dst.base->bytes, SCF_X64_I2G); - - if (std->src.imm_size < inst->dst.base->bytes) - std->src.imm = scf_zero_extend(std->src.imm, std->src.imm_size); - - inst2 = x64_make_inst_I2G(OpCode, inst->dst.base, (uint8_t*)&std->src.imm, inst->dst.base->bytes); - } - if (!inst2) - return -ENOMEM; + if (inst->src.mem_flag) { + assert(std->dst.mem_flag); - memcpy(inst->code, inst2->code, inst2->len); - inst->len = inst2->len; - - inst->src.base = std->src.base; - inst->src.index = NULL; - inst->src.scale = 0; - inst->src.disp = 0; - inst->src.flag = 0; - - free(inst2); - inst2 = NULL; + __x64_peep_src_was_mem(inst, &std->src); continue; - } else if (inst->dst.flag) { - + } else if (inst->dst.mem_flag) { if (x64_inst_data_is_reg(&inst->src) && x64_inst_data_is_reg(&std->src) && inst->src.base != std->src.base) { - if (!inst->dst.index) - inst2 = x64_make_inst_G2P((scf_x64_OpCode_t*)inst->OpCode, - inst->dst.base, inst->dst.disp, - std->src.base); - else - inst2 = x64_make_inst_G2SIB((scf_x64_OpCode_t*)inst->OpCode, - inst->dst.base, - inst->dst.index, inst->dst.scale, inst->dst.disp, - std->src.base); - if (!inst2) - return -ENOMEM; - - memcpy(inst->code, inst2->code, inst2->len); - inst->len = inst2->len; - - inst->src.base = std->src.base; - inst->src.index = NULL; - inst->src.scale = 0; - inst->src.disp = 0; - inst->src.flag = 0; - - free(inst2); - inst2 = NULL; + __x64_peep_mov_to_mem(inst, &std->src); continue; } } @@ -206,8 +238,8 @@ static int _x64_peephole_mov(scf_vector_t* save_insts, scf_vector_t* peep_insts, for (j = peep_insts->size - 1; j >= 0; j--) { std = peep_insts->data[j]; - if ((std->src.flag && (std->src.base == r1 || std->src.index == r1)) - || (std->dst.flag && (std->dst.base == r1 || std->dst.index == r1))) + if ((std->src.mem_flag && (std->src.base == r1 || std->src.index == r1)) + || (std->dst.mem_flag && (std->dst.base == r1 || std->dst.index == r1))) assert(0 == scf_vector_del(peep_insts, std)); } } @@ -220,67 +252,43 @@ static int _x64_peephole_cmp(scf_vector_t* save_insts, scf_vector_t* peep_insts, { scf_3ac_code_t* c = inst->c; scf_basic_block_t* bb = c->basic_block; - scf_instruction_t* inst2; scf_instruction_t* std; - + scf_inst_data_t* id; int j; + for (j = peep_insts->size - 1; j >= 0; j--) { std = peep_insts->data[j]; if (SCF_X64_LEA == std->OpCode->type) break; - if (inst->src.flag) { + int ret = 0; + if (inst->src.mem_flag) { if (scf_inst_data_same(&inst->src, &std->src)) - inst->src.base = std->dst.base; + id = &std->dst; else if (scf_inst_data_same(&inst->src, &std->dst)) - inst->src.base = std->src.base; + id = &std->src; else goto check; - inst2 = x64_make_inst_E2G((scf_x64_OpCode_t*) inst->OpCode, inst->dst.base, inst->src.base); - if (!inst2) - return -ENOMEM; - - inst->src.index = NULL; - inst->src.scale = 0; - inst->src.disp = 0; - inst->src.flag = 0; + ret = __x64_peep_src_was_mem(inst, id); - } else if (inst->dst.flag) { + } else if (inst->dst.mem_flag) { if (scf_inst_data_same(&inst->dst, &std->src)) - inst->dst.base = std->dst.base; + id = &std->dst; else if (scf_inst_data_same(&inst->dst, &std->dst)) - inst->dst.base = std->src.base; + id = &std->src; else goto check; - if (inst->src.imm_size > 0) - inst2 = x64_make_inst_I2E((scf_x64_OpCode_t*)inst->OpCode, - inst->dst.base, - (uint8_t*)&inst->src.imm, inst->src.imm_size); - else - inst2 = x64_make_inst_G2E((scf_x64_OpCode_t*)inst->OpCode, - inst->dst.base, - inst->src.base); - if (!inst2) - return -ENOMEM; - - inst->dst.index = NULL; - inst->dst.scale = 0; - inst->dst.disp = 0; - inst->dst.flag = 0; - } else - goto check; - - memcpy(inst->code, inst2->code, inst2->len); - inst->len = inst2->len; + ret = __x64_peep_dst_was_mem(inst, id); + } - free(inst2); - inst2 = NULL; + if (ret < 0) + return ret; check: if (x64_inst_data_is_reg(&std->dst)) { @@ -479,7 +487,7 @@ static int _x64_peephole_function(scf_vector_t* save_insts, scf_function_t* f) continue; assert(0 == scf_vector_del(c->instructions, inst)); - assert(0 == scf_vector_del(save_insts, inst)); + assert(0 == scf_vector_del(save_insts, inst)); free(inst); inst = NULL; diff --git a/native/x64/scf_x64_reg.c b/native/x64/scf_x64_reg.c index 9374eed..38505ce 100644 --- a/native/x64/scf_x64_reg.c +++ b/native/x64/scf_x64_reg.c @@ -165,7 +165,7 @@ int x64_caller_save_regs(scf_3ac_code_t* c, const char* regs[], int nb_regs, int inst = x64_make_inst_G2P(movsd, rsp, size + stack_size, r2); else { inst = x64_make_inst_I2E(sub, rsp, (uint8_t*)&imm, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(movsd, rsp, 0, r2); } @@ -175,7 +175,7 @@ int x64_caller_save_regs(scf_3ac_code_t* c, const char* regs[], int nb_regs, int else inst = x64_make_inst_G(push, r2); } - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); saved_regs[n++] = r2; size += 8; @@ -189,7 +189,7 @@ int x64_caller_save_regs(scf_3ac_code_t* c, const char* regs[], int nb_regs, int inst = x64_make_inst_G2P(movsd, rsp, size + stack_size, r2); else { inst = x64_make_inst_I2E(sub, rsp, (uint8_t*)&imm, 4); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2P(movsd, rsp, 0, r2); } @@ -199,7 +199,7 @@ int x64_caller_save_regs(scf_3ac_code_t* c, const char* regs[], int nb_regs, int else inst = x64_make_inst_G(push, r2); } - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); saved_regs[n++] = r2; size += 8; @@ -216,7 +216,7 @@ int x64_caller_save_regs(scf_3ac_code_t* c, const char* regs[], int nb_regs, int return size; } -int x64_pop_regs(scf_vector_t* instructions, scf_register_t** regs, int nb_regs, scf_register_t** updated_regs, int nb_updated) +int x64_pop_regs(scf_3ac_code_t* c, scf_register_t** regs, int nb_regs, scf_register_t** updated_regs, int nb_updated) { scf_register_t* rsp = x64_find_register("rsp"); scf_register_t* r; @@ -260,15 +260,15 @@ int x64_pop_regs(scf_vector_t* instructions, scf_register_t** regs, int nb_regs, if (i == nb_updated) { if (X64_COLOR_TYPE(r2->color)) { inst = x64_make_inst_P2G(movsd, r2, rsp, 0); - X64_INST_ADD_CHECK(instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_I2E(add, rsp, (uint8_t*)&imm, 4); } else inst = x64_make_inst_G(pop, r2); - X64_INST_ADD_CHECK(instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { inst = x64_make_inst_I2E(add, rsp, (uint8_t*)&imm, 4); - X64_INST_ADD_CHECK(instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } return 0; @@ -414,7 +414,7 @@ int x64_save_var2(scf_dag_node_t* dn, scf_register_t* r, scf_3ac_code_t* c, scf_ } inst = x64_make_inst_G2M(&rela, mov, v, NULL, r); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); end: @@ -718,7 +718,7 @@ int x64_load_const(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf lea = x64_find_OpCode(SCF_X64_LEA, size, size, SCF_X64_E2G); inst = x64_make_inst_M2G(&rela, lea, r, NULL, v); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); } else if (v->nb_dimentions > 0) { @@ -727,7 +727,7 @@ int x64_load_const(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf lea = x64_find_OpCode(SCF_X64_LEA, size, size, SCF_X64_E2G); inst = x64_make_inst_M2G(&rela, lea, r, NULL, v); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, v, NULL); } else if (SCF_FUNCTION_PTR == v->type) { @@ -740,17 +740,17 @@ int x64_load_const(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf lea = x64_find_OpCode(SCF_X64_LEA, size, size, SCF_X64_E2G); inst = x64_make_inst_M2G(&rela, lea, r, NULL, v); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->text_relas, rela, c, NULL, v->func_ptr); } else { xor = x64_find_OpCode(SCF_X64_XOR, size, size, SCF_X64_G2E); inst = x64_make_inst_G2E(xor, r, r); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } } else { mov = x64_find_OpCode(SCF_X64_MOV, size, size, SCF_X64_I2G); inst = x64_make_inst_I2G(mov, r, (uint8_t*)&v->data, size); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } return 0; @@ -826,7 +826,7 @@ int x64_load_reg(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_f } inst = x64_make_inst_M2G(&rela, mov, r, NULL, dn->var); - X64_INST_ADD_CHECK(c->instructions, inst, rela); + X64_INST_ADD_CHECK(c, inst, rela); X64_RELA_ADD_CHECK(f->data_relas, rela, c, dn->var, NULL); dn->loaded = 1; @@ -1056,19 +1056,19 @@ int x64_array_index_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* in if (scf_variable_signed(index->var)) { mov = x64_find_OpCode(SCF_X64_MOVSX, ri->bytes, ri2->bytes, SCF_X64_E2G); inst = x64_make_inst_E2G(mov, ri2, ri); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else if (ri->bytes <= 2) { mov = x64_find_OpCode(SCF_X64_MOVZX, ri->bytes, ri2->bytes, SCF_X64_E2G); inst = x64_make_inst_E2G(mov, ri2, ri); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } else { assert(4 == ri->bytes); /* xor = x64_find_OpCode(SCF_X64_XOR, 8, 8, SCF_X64_G2E); inst = x64_make_inst_G2E(xor, ri2, ri2); - X64_INST_ADD_CHECK(c->instructions, inst); + X64_INST_ADD_CHECK(c, inst); mov = x64_find_OpCode(SCF_X64_MOV, 4, 4, SCF_X64_E2G); */ } @@ -1093,7 +1093,7 @@ int x64_array_index_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* in mov = x64_find_OpCode(SCF_X64_MOV, 8, 8, SCF_X64_G2E); inst = x64_make_inst_G2E(mov, rs, ri2); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); shl = x64_find_OpCode(SCF_X64_SHL, 1, 8, SCF_X64_I2E); add = x64_find_OpCode(SCF_X64_ADD, 8, 8, SCF_X64_G2E); @@ -1116,17 +1116,17 @@ int x64_array_index_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* in count -= i; inst = x64_make_inst_I2E(shl, rs, (uint8_t*)&count, 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); inst = x64_make_inst_G2E(add, rs, ri2); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); count = i; } if (count > 0) { inst = x64_make_inst_I2E(shl, rs, (uint8_t*)&count, 1); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); } ri = rs; @@ -1242,7 +1242,7 @@ int x64_push_callee_regs(scf_3ac_code_t* c, scf_function_t* f) if (j < N) { inst = x64_make_inst_G(push, r); - X64_INST_ADD_CHECK(f->init_code->instructions, inst, NULL); + X64_INST_ADD_CHECK(f->init_code, inst, NULL); f->init_code_bytes += inst->len; } @@ -1278,7 +1278,7 @@ int x64_pop_callee_regs(scf_3ac_code_t* c, scf_function_t* f) if (j < N) { inst = x64_make_inst_G(pop, r); - X64_INST_ADD_CHECK(c->instructions, inst, NULL); + X64_INST_ADD_CHECK(c, inst, NULL); bb->code_bytes += inst->len; f->callee_saved_size += 8; diff --git a/native/x64/scf_x64_reg.h b/native/x64/scf_x64_reg.h index 9be5f65..23bf2d1 100644 --- a/native/x64/scf_x64_reg.h +++ b/native/x64/scf_x64_reg.h @@ -109,8 +109,7 @@ int x64_save_var(scf_dag_node_t* dn, scf_3ac_code_t* c, scf_func int x64_save_var2(scf_dag_node_t* dn, scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f); -int x64_push_regs(scf_vector_t* instructions, uint32_t* regs, int nb_regs); -int x64_pop_regs (scf_vector_t* instructions, scf_register_t** regs, int nb_regs, scf_register_t** updated_regs, int nb_updated); +int x64_pop_regs(scf_3ac_code_t* c, scf_register_t** regs, int nb_regs, scf_register_t** updated_regs, int nb_updated); int x64_caller_save_regs(scf_3ac_code_t* c, const char* regs[], int nb_regs, int stack_size, scf_register_t** saved_regs, scf_register_t** drop_regs, int* n_drops); diff --git a/native/x64/scf_x64_reg_util.h b/native/x64/scf_x64_reg_util.h index 1f23aaf..c05dd14 100644 --- a/native/x64/scf_x64_reg_util.h +++ b/native/x64/scf_x64_reg_util.h @@ -43,7 +43,7 @@ static inline int x64_inst_data_is_reg(scf_inst_data_t* id) scf_register_t* rsp = x64_find_register("rsp"); scf_register_t* rbp = x64_find_register("rbp"); - if (!id->flag && id->base && id->base != rsp && id->base != rbp && 0 == id->imm_size) + if (!id->mem_flag && id->base && id->base != rsp && id->base != rbp && 0 == id->imm_size) return 1; return 0; } @@ -53,21 +53,21 @@ static inline int x64_inst_data_is_local(scf_inst_data_t* id) scf_register_t* rbp = x64_find_register("rbp"); scf_register_t* rsp = x64_find_register("rsp"); - if (id->flag && (id->base == rbp || id->base == rsp)) + if (id->mem_flag && (id->base == rbp || id->base == rsp)) return 1; return 0; } static inline int x64_inst_data_is_global(scf_inst_data_t* id) { - if (id->flag && !id->base) + if (id->mem_flag && !id->base) return 1; return 0; } static inline int x64_inst_data_is_const(scf_inst_data_t* id) { - if (!id->flag && id->imm_size > 0) + if (!id->mem_flag && id->imm_size > 0) return 1; return 0; } @@ -77,7 +77,7 @@ static inline int x64_inst_data_is_pointer(scf_inst_data_t* id) scf_register_t* rbp = x64_find_register("rbp"); scf_register_t* rsp = x64_find_register("rsp"); - if (id->flag && id->base && id->base != rbp && id->base != rsp) + if (id->mem_flag && id->base && id->base != rbp && id->base != rsp) return 1; return 0; } -- 2.25.1