From: yu.dongliang <18588496441@163.com>
Date: Fri, 20 Oct 2023 05:21:33 +0000 (+0800)
Subject: ses_step_output.c
X-Git-Url: http://baseworks.info/?a=commitdiff_plain;h=0a4cb4e9ad5d5ffe86901f07e7eb2f428b4bb740;p=ses.git

ses_step_output.c
---

diff --git a/ses_step_output.c b/ses_step_output.c
index 82470fd..bd90030 100644
--- a/ses_step_output.c
+++ b/ses_step_output.c
@@ -1,16 +1,183 @@
 #include"ses_core.h"
 
+int __dfs_path_pos(ScfEfunction* f, ScfEline* el)
+{
+	ScfEcomponent*   c;
+	ScfEcomponent*   c2;
+	ScfEline*        el2;
+	ScfEpin*         p;
+	ScfEpin*         p2;
+
+	size_t i;
+	size_t j;
+
+	if (SCF_EDA_PIN_POS & el->flags)
+		return 1;
+	if (SCF_EDA_PIN_NEG & el->flags)
+		return 0;
+
+	for (i = 0; i + 1 < el->n_pins; i += 2) {
+
+		c  = f->components[el->pins[i]];
+		p  = c->pins      [el->pins[i + 1]];
+
+		if (p->vflag)
+			continue;
+		p->vflag = 1;
+
+		if (SCF_EDA_Diode == c->type) {
+
+			if (SCF_EDA_Diode_POS == p->id || SCF_EDA_Status_OFF == c->status)
+				continue;
+
+			p2 = c->pins[SCF_EDA_Diode_POS];
+
+		} else if (SCF_EDA_NPN == c->type) {
+
+			if (SCF_EDA_NPN_E != p->id || SCF_EDA_Status_OFF == c->status)
+				continue;
+
+			p2        = c->pins[SCF_EDA_NPN_B];
+			p2->vflag = 1;
+
+			if (__dfs_path_pos(f, f->elines[p2->lid]))
+				return 1;
+
+			p2        = c->pins[SCF_EDA_NPN_C];
+			p2->vflag = 1;
+
+			if (__dfs_path_pos(f, f->elines[p2->lid]))
+				return 1;
+
+			continue;
+		} else
+			p2 = c->pins[!p->id];
+
+		if (p2->vflag)
+			continue;
+		p2->vflag = 1;
+
+		if (__dfs_path_pos(f, f->elines[p2->lid]))
+			return 1;
+	}
+
+	return 0;
+}
+
+int __dfs_path_neg(ScfEfunction* f, ScfEline* el)
+{
+	ScfEcomponent* c;
+	ScfEpin*       p;
+	ScfEpin*       p2;
+
+	size_t i;
+	size_t j;
+
+	if (SCF_EDA_PIN_NEG & el->flags)
+		return 1;
+	if (SCF_EDA_PIN_POS & el->flags)
+		return 0;
+
+	for (i = 0; i + 1 < el->n_pins; i += 2) {
+
+		c  = f->components[el->pins[i]];
+		p  = c->pins      [el->pins[i + 1]];
+
+		if (p->vflag)
+			continue;
+		p->vflag = 1;
+
+		if (SCF_EDA_Diode == c->type) {
+
+			if (SCF_EDA_Diode_NEG == p->id || SCF_EDA_Status_OFF == c->status)
+				continue;
+			p2 = c->pins[SCF_EDA_Diode_NEG];
+
+		} else if (SCF_EDA_NPN == c->type) {
+
+			if (SCF_EDA_NPN_E == p->id || SCF_EDA_Status_OFF == c->status)
+				continue;
+			p2 = c->pins[SCF_EDA_NPN_E];
+		} else
+			p2 = c->pins[!p->id];
+
+		if (p2->vflag)
+			continue;
+		p2->vflag = 1;
+
+		if (__dfs_path_neg(f, f->elines[p2->lid]))
+			return 1;
+	}
+
+	return 0;
+}
+
+int dfs_path_pos(ScfEfunction* f, ScfEline* el)
+{
+	ScfEcomponent* c;
+	ScfEpin*       p;
+
+	size_t i;
+	size_t j;
+
+	for (i = 0; i < f->n_components; i++) {
+		c         = f->components[i];
+
+		for (j = 0; j < c->n_pins; j++) {
+			p         = c->pins[j];
+			p->vflag  = 0;
+		}
+	}
+
+	return __dfs_path_pos(f, el);
+}
+
+int dfs_path_neg(ScfEfunction* f, ScfEline* el)
+{
+	ScfEcomponent* c;
+	ScfEpin*       p;
+
+	size_t i;
+	size_t j;
+
+	for (i = 0; i < f->n_components; i++) {
+		c         = f->components[i];
+
+		for (j = 0; j < c->n_pins; j++) {
+			p         = c->pins[j];
+			p->vflag  = 0;
+		}
+	}
+
+	return __dfs_path_neg(f, el);
+}
+
 static int _output_handler(ScfEfunction* f, int64_t ns, int64_t count, ses_ctx_t* ctx)
 {
-	ScfEline* el;
+	ScfEcomponent* B  = f->components[0];
+	ScfEpin*       Bp = B->pins[SCF_EDA_Battery_POS];
+	ScfEpin*       Bn = B->pins[SCF_EDA_Battery_NEG];
+	ScfEline*      el;
 
 	size_t i;
 
 	for (i = 0; i < f->n_elines; i++) {
 		el =        f->elines[i];
 
-		if (SCF_EDA_PIN_OUT & el->flags)
+		if (SCF_EDA_PIN_OUT & el->flags) {
+
+			if (dfs_path_pos(f, el)) {
+
+				if (!dfs_path_neg(f, el))
+					el->v = Bp->v;
+
+			} else if (dfs_path_neg(f, el))
+				el->v = Bn->v;
+			else
+				return -EINVAL;
+
 			scf_logw("IN el: %ld, V: %lg\n", el->id, el->v);
+		}
 	}
 
 	return 0;
diff --git a/ses_steps.c b/ses_steps.c
index 92534ba..c1d1409 100644
--- a/ses_steps.c
+++ b/ses_steps.c
@@ -41,7 +41,7 @@ static ses_step_t*  ses_steps_1[] =
 
 	&ses_step_va_diode,
 	&ses_step_va_transistor,
-#if 0
+#if 1
 	&ses_step_jr,
 	&ses_step_va,
 	&ses_step_va_balance,