}
}
- ses_ir_u(&v, &jv, a, ja, p->sr, p->jsr);
+ c = f->components[p->cid];
+
+ if (SCF_EDA_Transistor == c->type
+ && (SCF_EDA_Transistor_B == p->id || SCF_EDA_Transistor_C == p->id)) {
+
+ ses_ir_u(&v, &jv, a, ja, p->sr - (p->r + p->dr), p->jsr - (p->jr + p->jdr));
+ } else
+ ses_ir_u(&v, &jv, a, ja, p->sr, p->jsr);
p->v = p0->v - v;
p->jv = p0->jv - jv;
- scf_loge("path: %d, v: %lg + j%lg, p->sr: %lg + j%lg, a: %lg + j%lg\n", path->index, v, jv, p->sr, p->jsr, a, ja);
+ scf_logd("path: %d, v: %lg + j%lg, p->sr: %lg + j%lg, a: %lg + j%lg\n", path->index, v, jv, p->sr, p->jsr, a, ja);
el = f->elines[p->lid];
el->v = p->v;
jr += p->jr + p->jdr;
if (i & 0x1) {
- c = f->components[p->cid];
r += c->r;
jr += c->jr;
ses_ur_i(&p->a, &p->ja, dv, jdv, r, jr);
- scf_loge("i: %d, c%ldp%ld, dv: %lg + j%lg, p->v: %lg + j%lg, dv: %lg + j%lg, r: %lg + j%lg, a: %lg + j%lg\n\n", i, p->cid, p->id,
- dv, jdv, p->v, p->jv, dv, jdv, r, jr, p->a, p->ja);
+ scf_loge("path: %d, i: %d, c%ldp%ld, p->v: %lg + j%lg, dv: %lg + j%lg, r: %lg + j%lg, a: %lg + j%lg\n\n", path->index, i, p->cid, p->id,
+ p->v, p->jv, dv, jdv, r, jr, p->a, p->ja);
r = 0;
jr = 0;
dv = p->v;
jdv = p->jv;
- scf_loge("i: %d, c%ldp%ld, dv: %lg + j%lg, p->v: %lg + j%lg, a: %lg + j%lg\n", i, p->cid, p->id, dv, jdv, p->v, p->jv, a, ja);
+ scf_loge("path: %d, i: %d, c%ldp%ld, p->v: %lg + j%lg, dv: %lg + j%lg, a: %lg + j%lg\n", path->index, i, p->cid, p->id, p->v, p->jv, dv, jdv, a, ja);
}
}
printf("\n");