1, 64 bits add, sub, mul, .etc for arm32,
authoryu.dongliang <18588496441@163.com>
Fri, 19 May 2023 09:11:11 +0000 (17:11 +0800)
committeryu.dongliang <18588496441@163.com>
Fri, 19 May 2023 09:11:14 +0000 (17:11 +0800)
2, use r12 for big disp when memory read / write, to decrease the complexity of register selection.

31 files changed:
core/scf_function.h
core/scf_variable.h
native/risc/scf_arm32.c
native/risc/scf_arm64.c
native/risc/scf_naja.c
native/risc/scf_risc.c
native/risc/scf_risc_graph.c
native/risc/scf_risc_inst.c
native/risc/scf_risc_rcg.c
native/risc/scf_risc_reg.c
native/risc/scf_risc_reg.h
native/risc/scf_risc_reg_arm32.c
native/risc/scf_risc_reg_arm64.c
native/risc/scf_risc_util.h
native/scf_native.h
native/x64/scf_x64.c
native/x64/scf_x64.h
native/x64/scf_x64_bb_color.c
native/x64/scf_x64_inst.c
native/x64/scf_x64_inst_binary.c
native/x64/scf_x64_inst_cmp.c
native/x64/scf_x64_inst_common.c
native/x64/scf_x64_inst_div.c
native/x64/scf_x64_inst_mul.c
native/x64/scf_x64_inst_shift.c
native/x64/scf_x64_inst_util.c
native/x64/scf_x64_peephole.c
native/x64/scf_x64_rcg.c
native/x64/scf_x64_reg.c
native/x64/scf_x64_reg.h
parse/scf_parse2.c

index cdfa296191106e8fecb4b80c094f0266a06269ab..7d6a654e85f820dbdba0402342627523368642c4 100644 (file)
@@ -20,6 +20,7 @@ struct scf_function_s {
 
        int               args_int;
        int               args_float;
+       int               args_double;
 
        int               op_type; // overloaded operator type
 
@@ -45,7 +46,7 @@ struct scf_function_s {
        scf_inst_ops_t*   iops;
        scf_regs_ops_t*   rops;
 
-       scf_vector_t*     init_insts;
+       scf_3ac_code_t*   init_code;
        int               init_code_bytes;
 
        int               local_vars_size;
index 8b4de1c0f0604367261c77a5256efcfefbcd892b..04d39de9472c26f96885b5fb87f837e171d271b5 100644 (file)
@@ -27,7 +27,7 @@ struct scf_variable_s {
        int                                     bp_offset;  // offset based on RBP / EBP register
        int                                     sp_offset;  // offset based on RSP / ESP register
        int                                     ds_offset;  // offset in data section
-       void*               rabi;
+       scf_register_t*     rabi;
 
        union {
                int32_t         i;
index 20e6d940261c7ef743d137a8af1ff57bc9a4d233..7a1b96d16cd5a3b54f576b204ac84d945f86395b 100644 (file)
@@ -1,5 +1,18 @@
 #include"scf_risc.h"
 
+scf_register_t* arm32_find_register(const char* name);
+
+#define ARM32_INST_ADD_CHECK(c, inst) \
+       do { \
+               if (!(inst)) \
+                       return NULL; \
+               int ret = scf_vector_add((c)->instructions, (inst)); \
+               if (ret < 0) { \
+                       free(inst); \
+                       return NULL; \
+               } \
+       } while (0)
+
 int arm32_inst_I2G(scf_3ac_code_t* c, scf_register_t* rd, uint64_t imm, int bytes)
 {
        scf_instruction_t* inst;
@@ -91,6 +104,7 @@ int arm32_inst_ADR2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, s
 int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rb, scf_variable_t* vs)
 {
        scf_register_t*       fp   = f->rops->find_register("fp");
+       scf_register_t*       r12  = f->rops->find_register("x12");
        scf_register_t*       ri   = NULL;
        scf_instruction_t*    inst = NULL;
        scf_rela_t*           rela = NULL;
@@ -98,6 +112,7 @@ int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
        int32_t  offset;
        uint32_t opcode;
 
+       int ret;
        int size = f->rops->variable_size(vs);
 
        if (!rb) {
@@ -153,17 +168,11 @@ int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
                                opcode = (0xe1 << 24) | (0x5 << 20) | (rb->id << 16) | (rd->id << 12) | (((offset & 0xf0) | 0xd) << 4) | (offset & 0xf);
 
                        } else {
-                               int ret = risc_select_free_reg(&ri, c, f, 0);
-                               if (ret < 0) {
-                                       scf_loge("\n");
-                                       return -EINVAL;
-                               }
-
-                               ret = arm32_inst_I2G(c, ri, offset, 4);
+                               ret = arm32_inst_I2G(c, r12, offset, 4);
                                if (ret < 0)
                                        return ret;
 
-                               opcode = (0xe1 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | (0xd << 4) | ri->id;
+                               opcode = (0xe1 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | (0xd << 4) | r12->id;
                        }
 
                } else {
@@ -175,17 +184,11 @@ int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
                                opcode = (0xe5 << 24) | (0x5 << 20) | (rb->id << 16) | (rd->id << 12) | offset;
 
                        } else {
-                               int ret = risc_select_free_reg(&ri, c, f, 0);
-                               if (ret < 0) {
-                                       scf_loge("\n");
-                                       return -EINVAL;
-                               }
-
-                               ret = arm32_inst_I2G(c, ri, offset, 4);
+                               ret = arm32_inst_I2G(c, r12, offset, 4);
                                if (ret < 0)
                                        return ret;
 
-                               opcode = (0xe7 << 24) | (0xd << 20) | (rb->id << 16) | (rd->id << 12) | ri->id;
+                               opcode = (0xe7 << 24) | (0xd << 20) | (rb->id << 16) | (rd->id << 12) | r12->id;
                        }
                }
 
@@ -204,17 +207,11 @@ int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
                        opcode = (0xe1 << 24) | (0x5 << 20) | (rb->id << 16) | (rd->id << 12) | (((offset & 0xf0) | 0xb) << 4) | (offset & 0xf);
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe1 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | (0xb << 4) | ri->id;
+                       opcode = (0xe1 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | (0xb << 4) | r12->id;
                }
 
                if (scf_variable_signed(vs))
@@ -235,39 +232,181 @@ int arm32_inst_M2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
                        opcode = (0xe5 << 24) | (0x1 << 20) | (rb->id << 16) | (rd->id << 12) | offset;
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
+                       if (ret < 0)
+                               return ret;
+
+                       opcode = (0xe7 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | r12->id;
+               }
+
+       } else if (8 == size) {
 
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+               if (offset & 0x3) {
+                       scf_loge("memory align error\n");
+                       return -EINVAL;
+               }
+
+               if (0 == offset)
+                       opcode = (0xe8 << 24) | (0xd << 20) | (rb->id << 16) | (1 << rd->id) | (1 << (rd->id + 1));
+               else {
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe7 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | ri->id;
+                       opcode = (0xe0 << 24) | (0x8 << 20) | (r12->id << 16) | (r12->id << 12) | rb->id;
+                       inst   = risc_make_inst(c, opcode);
+                       RISC_INST_ADD_CHECK(c->instructions, inst);
+
+                       opcode = (0xe8 << 24) | (0xd << 20) | (r12->id << 16) | (1 << rd->id) | (1 << (rd->id + 1));
+               }
+       } else
+               return -EINVAL;
+
+       inst    = risc_make_inst(c, opcode);
+       RISC_INST_ADD_CHECK(c->instructions, inst);
+       return 0;
+}
+
+int arm32_inst_G2MF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf_register_t* rb, scf_variable_t* vd)
+{
+       scf_register_t*     fp   = f->rops->find_register("fp");
+       scf_register_t*     r12  = f->rops->find_register("x12");
+       scf_instruction_t*  inst = NULL;
+       scf_rela_t*         rela = NULL;
+
+       int32_t  offset;
+       uint32_t opcode;
+       uint32_t SIZE = 0;
+       uint32_t D    = 0;
+       uint32_t V    = 0;
+
+       int ret;
+
+       int size = f->rops->variable_size(vd);
+
+       if (!rb) {
+               if (vd->local_flag || vd->tmp_flag) {
+
+                       offset = vd->bp_offset;
+                       rb     = fp;
+
+               } else if (vd->global_flag) {
+                       offset = 0;
+                       rb     = r12;
+
+                       opcode = (0xe3 << 24) | (rb->id << 12);
+                       inst   = risc_make_inst(c, opcode);
+                       RISC_INST_ADD_CHECK(c->instructions, inst);
+                       RISC_RELA_ADD_CHECK(f->data_relas, rela, c, vd, NULL);
+                       rela->type = R_ARM_REL32;
+
+                       opcode = (0xe3 << 24) | (0x4 << 20) | (rb->id << 12);
+                       inst   = risc_make_inst(c, opcode);
+                       RISC_INST_ADD_CHECK(c->instructions, inst);
+
+                       opcode = (0xe7 << 24) | (0x9 << 20) | (rb->id << 16) | (rb->id << 12) | 0xf;
+                       inst   = risc_make_inst(c, opcode);
+                       RISC_INST_ADD_CHECK(c->instructions, inst);
+
+                       opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (rb->id << 12) | 0xf;
+                       inst   = risc_make_inst(c, opcode);
+                       RISC_INST_ADD_CHECK(c->instructions, inst);
+
+               } else {
+                       scf_loge("temp var should give a register\n");
+                       return -EINVAL;
+               }
+
+       } else {
+               if (vd->local_flag || vd->tmp_flag)
+                       offset = vd->bp_offset;
+               else
+                       offset = vd->offset;
+       }
+
+
+       if (2 == size) {
+
+               if (offset & 0x1) {
+                       scf_loge("memory align error\n");
+                       return -EINVAL;
+               }
+
+               offset >>= 1;
+               SIZE   =   1;
+               D      =   rs->id & 0x1;
+               V      =   rs->id >> 1;
+
+       } else if (4 == size) {
+
+               if (offset & 0x3) {
+                       scf_loge("memory align error\n");
+                       return -EINVAL;
+               }
+
+               offset >>= 2;
+               SIZE   =   2;
+               D      =   rs->id & 0x1;
+               V      =   rs->id >> 1;
+
+       } else if (8 == size) {
+
+               if (offset & 0x3) {
+                       scf_loge("memory align error\n");
+                       return -EINVAL;
                }
 
+               offset >>= 2;
+               SIZE   =   3;
+               V      =   rs->id & 0xf;
+               D      =  (rs->id >> 4) & 0x1;
        } else
                return -EINVAL;
 
+       if (offset >= 0 && offset < 0xff)
+               opcode = (0xed << 24) | (0x8 << 20) | (rb->id << 16) | (0x2 << 10) | (SIZE << 8) | offset;
+
+       else if (offset < 0 && offset >= -0xff) {
+               offset = -offset;
+               opcode = (0xed << 24) | (0x0 << 20) | (rb->id << 16) | (0x2 << 10) | (SIZE << 8) | offset;
+
+       } else {
+               ret = arm32_inst_I2G(c, r12, offset, 4);
+               if (ret < 0)
+                       return ret;
+
+               opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (r12->id << 12) | (SIZE << 7) | r12->id;
+               inst    = risc_make_inst(c, opcode);
+               RISC_INST_ADD_CHECK(c->instructions, inst);
+
+               opcode = (0xed << 24) | (0x8 << 20) | (r12->id << 16) | (0x2 << 10) | (SIZE << 8) | 0;
+       }
+
+       opcode |= (D << 22) | (V << 12);
        inst    = risc_make_inst(c, opcode);
        RISC_INST_ADD_CHECK(c->instructions, inst);
+
        return 0;
 }
 
 int arm32_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf_register_t* rb, scf_variable_t* vs)
 {
-       scf_register_t* fp   = f->rops->find_register("fp");
-       scf_register_t* ri   = NULL;
-       scf_instruction_t*    inst = NULL;
-       scf_rela_t*           rela = NULL;
+       scf_register_t*     fp   = f->rops->find_register("fp");
+       scf_register_t*     r12  = f->rops->find_register("x12");
+       scf_register_t*     ri   = NULL;
+       scf_instruction_t*  inst = NULL;
+       scf_rela_t*         rela = NULL;
 
        int32_t  offset;
        uint32_t opcode;
 
+       int ret;
+
        int size = f->rops->variable_size(vs);
 
+       if (scf_variable_float(vs))
+               return arm32_inst_G2MF(c, f, rs, rb, vs);
+
        if (!rb) {
                if (vs->local_flag || vs->tmp_flag) {
 
@@ -276,12 +415,7 @@ int arm32_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf
 
                } else if (vs->global_flag) {
                        offset = 0;
-
-                       int ret = risc_select_free_reg(&rb, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
+                       rb     = r12;
 
                        ret = arm32_inst_ADR2G(c, f, rb, vs);
                        if (ret < 0)
@@ -309,17 +443,11 @@ int arm32_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf
                        opcode = (0xe5 << 24) | (0x4 << 20) | (rb->id << 16) | (rs->id << 12) | offset;
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe7 << 24) | (0xc << 20) | (rb->id << 16) | (rs->id << 12) | ri->id;
+                       opcode = (0xe7 << 24) | (0xc << 20) | (rb->id << 16) | (rs->id << 12) | r12->id;
                }
 
        } else if (2 == size) {
@@ -337,17 +465,11 @@ int arm32_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf
                        opcode = (0xe1 << 24) | (0x4 << 20) | (rb->id << 16) | (rs->id << 12) | (((offset & 0xf0) | 0xb) << 4) | (offset & 0xf);
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe1 << 24) | (0x8 << 20) | (rb->id << 16) | (rs->id << 12) | (0xb << 4) | ri->id;
+                       opcode = (0xe1 << 24) | (0x8 << 20) | (rb->id << 16) | (rs->id << 12) | (0xb << 4) | r12->id;
                }
 
        } else if (4 == size) {
@@ -365,19 +487,33 @@ int arm32_inst_G2M(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf
                        opcode = (0xe5 << 24) | (0x0 << 20) | (rb->id << 16) | (rs->id << 12) | offset;
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe7 << 24) | (0x8 << 20) | (rb->id << 16) | (rs->id << 12) | ri->id;
+                       opcode = (0xe7 << 24) | (0x8 << 20) | (rb->id << 16) | (rs->id << 12) | r12->id;
+               }
+
+       } else if (8 == size) {
+
+               if (offset & 0x3) {
+                       scf_loge("memory align error\n");
+                       return -EINVAL;
                }
 
+               if (0 == offset)
+                       opcode = (0xe8 << 24) | (0xc << 20) | (rb->id << 16) | (1 << rs->id) | (1 << (rs->id + 1));
+               else {
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
+                       if (ret < 0)
+                               return ret;
+
+                       opcode = (0xe0 << 24) | (0x8 << 20) | (r12->id << 16) | (r12->id << 12) | rb->id;
+                       inst   = risc_make_inst(c, opcode);
+                       RISC_INST_ADD_CHECK(c->instructions, inst);
+
+                       opcode = (0xe8 << 24) | (0xc << 20) | (r12->id << 16) | (1 << rs->id) | (1 << (rs->id + 1));
+               }
        } else
                return -EINVAL;
 
@@ -426,11 +562,14 @@ int arm32_inst_ISTR2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd,
 
 int arm32_inst_G2P(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf_register_t* rb, int32_t offset, int size)
 {
-       scf_register_t* ri   = NULL;
-       scf_instruction_t*    inst = NULL;
+       scf_register_t*     r12  = f->rops->find_register("x12");
+       scf_register_t*     ri   = NULL;
+       scf_instruction_t*  inst = NULL;
 
        uint32_t opcode;
 
+       int ret;
+
        if (!rb)
                return -EINVAL;
 
@@ -444,17 +583,11 @@ int arm32_inst_G2P(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf
                        opcode = (0xe5 << 24) | (0x4 << 20) | (rb->id << 16) | (rs->id << 12) | offset;
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe7 << 24) | (0xc << 20) | (rb->id << 16) | (rs->id << 12) | ri->id;
+                       opcode = (0xe7 << 24) | (0xc << 20) | (rb->id << 16) | (rs->id << 12) | r12->id;
                }
 
        } else if (2 == size) {
@@ -472,17 +605,11 @@ int arm32_inst_G2P(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf
                        opcode = (0xe1 << 24) | (0x4 << 20) | (rb->id << 16) | (rs->id << 12) | (((offset & 0xf0) | 0xb) << 4) | (offset & 0xf);
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe1 << 24) | (0x8 << 20) | (rb->id << 16) | (rs->id << 12) | (0xb << 4) | ri->id;
+                       opcode = (0xe1 << 24) | (0x8 << 20) | (rb->id << 16) | (rs->id << 12) | (0xb << 4) | r12->id;
                }
 
        } else if (4 == size) {
@@ -500,17 +627,11 @@ int arm32_inst_G2P(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf
                        opcode = (0xe5 << 24) | (0x0 << 20) | (rb->id << 16) | (rs->id << 12) | offset;
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe7 << 24) | (0x8 << 20) | (rb->id << 16) | (rs->id << 12) | ri->id;
+                       opcode = (0xe7 << 24) | (0x8 << 20) | (rb->id << 16) | (rs->id << 12) | r12->id;
                }
 
        } else
@@ -524,13 +645,15 @@ int arm32_inst_G2P(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, scf
 
 int arm32_inst_P2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rb, int32_t offset, int size)
 {
-       scf_register_t* ri   = NULL;
-       scf_instruction_t*    inst = NULL;
+       scf_register_t*     r12  = f->rops->find_register("x12");
+       scf_instruction_t*  inst = NULL;
 
        uint32_t opcode;
        uint32_t SIZE = 0;
        uint32_t S    = 1;
 
+       int ret;
+
        if (!rb)
                return -EINVAL;
 
@@ -544,17 +667,11 @@ int arm32_inst_P2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
                        opcode = (0xe5 << 24) | (0x5 << 20) | (rb->id << 16) | (rd->id << 12) | offset;
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe7 << 24) | (0xd << 20) | (rb->id << 16) | (rd->id << 12) | ri->id;
+                       opcode = (0xe7 << 24) | (0xd << 20) | (rb->id << 16) | (rd->id << 12) | r12->id;
                }
 
        } else if (2 == size) {
@@ -572,17 +689,11 @@ int arm32_inst_P2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
                        opcode = (0xe1 << 24) | (0x5 << 20) | (rb->id << 16) | (rd->id << 12) | (((offset & 0xf0) | 0xb) << 4) | (offset & 0xf);
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe1 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | (0xb << 4) | ri->id;
+                       opcode = (0xe1 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | (0xb << 4) | r12->id;
                }
 
        } else if (4 == size) {
@@ -600,17 +711,11 @@ int arm32_inst_P2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
                        opcode = (0xe5 << 24) | (0x1 << 20) | (rb->id << 16) | (rd->id << 12) | offset;
 
                } else {
-                       int ret = risc_select_free_reg(&ri, c, f, 0);
-                       if (ret < 0) {
-                               scf_loge("\n");
-                               return -EINVAL;
-                       }
-
-                       ret = arm32_inst_I2G(c, ri, offset, 4);
+                       ret = arm32_inst_I2G(c, r12, offset, 4);
                        if (ret < 0)
                                return ret;
 
-                       opcode = (0xe7 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | ri->id;
+                       opcode = (0xe7 << 24) | (0x9 << 20) | (rb->id << 16) | (rd->id << 12) | r12->id;
                }
 
        } else
@@ -623,8 +728,8 @@ int arm32_inst_P2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf
 
 int arm32_inst_ADRP2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rb, int32_t offset)
 {
-       scf_register_t* r    = NULL;
-       scf_instruction_t*    inst = NULL;
+       scf_register_t*     r12  = f->rops->find_register("x12");
+       scf_instruction_t*  inst = NULL;
 
        uint32_t opcode = 0;
 
@@ -636,15 +741,11 @@ int arm32_inst_ADRP2G(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd,
                opcode = (0xe2 << 24) | (0x4 << 20) | (rb->id << 16) | (rd->id << 12) | offset;
 
        } else {
-               int ret = risc_select_free_reg(&r, c, f, 0);
+               int ret = arm32_inst_I2G(c, r12, offset, 4);
                if (ret < 0)
                        return ret;
 
-               ret = arm32_inst_I2G(c, r, offset, 4);
-               if (ret < 0)
-                       return ret;
-
-               opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (rd->id << 12) | r->id;
+               opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (rd->id << 12) | r12->id;
        }
 
        inst   = risc_make_inst(c, opcode);
@@ -751,10 +852,10 @@ int arm32_inst_G2SIB(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, s
 
 int arm32_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rb, scf_variable_t* vs)
 {
-       scf_register_t* fp   = f->rops->find_register("fp");
-       scf_register_t* ro   = NULL;
-       scf_instruction_t*    inst = NULL;
-       scf_rela_t*           rela = NULL;
+       scf_register_t*     fp   = f->rops->find_register("fp");
+       scf_register_t*     r12  = f->rops->find_register("x12");
+       scf_instruction_t*  inst = NULL;
+       scf_rela_t*         rela = NULL;
 
        int32_t  offset;
        uint32_t opcode;
@@ -764,9 +865,6 @@ int arm32_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc
 
        int size = f->rops->variable_size(vs);
 
-       scf_loge("\n");
-       return -EINVAL;
-
        if (!rb) {
                if (vs->local_flag || vs->tmp_flag) {
 
@@ -775,10 +873,7 @@ int arm32_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc
 
                } else if (vs->global_flag) {
                        offset = 0;
-
-                       int ret = risc_select_free_reg(&rb, c, f, 0);
-                       if (ret < 0)
-                               return ret;
+                       rb     = r12;
 
                        opcode = (0xe3 << 24) | (rb->id << 12);
                        inst   = risc_make_inst(c, opcode);
@@ -837,12 +932,12 @@ int arm32_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc
 
        } else if (8 == size) {
 
-               if (offset & 0x7) {
+               if (offset & 0x3) {
                        scf_loge("memory align error\n");
                        return -EINVAL;
                }
 
-               offset >>= 3;
+               offset >>= 2;
                SIZE   =   3;
                V      =   rd->id & 0xf;
                D      =  (rd->id >> 4) & 0x1;
@@ -857,19 +952,15 @@ int arm32_inst_M2GF(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, sc
                opcode = (0xed << 24) | (0x1 << 20) | (rb->id << 16) | (0x2 << 10) | (SIZE << 8) | offset;
 
        } else {
-               int ret = risc_select_free_reg(&ro, c, f, 0);
+               int ret = arm32_inst_I2G(c, r12, offset, 4);
                if (ret < 0)
                        return ret;
 
-               ret = arm32_inst_I2G(c, ro, offset, 4);
-               if (ret < 0)
-                       return ret;
-
-               opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (ro->id << 12) | (SIZE << 7) | ro->id;
+               opcode = (0xe0 << 24) | (0x8 << 20) | (rb->id << 16) | (r12->id << 12) | (SIZE << 7) | r12->id;
                inst    = risc_make_inst(c, opcode);
                RISC_INST_ADD_CHECK(c->instructions, inst);
 
-               opcode = (0xed << 24) | (0x9 << 20) | (ro->id << 16) | (0x2 << 10) | (SIZE << 8) | 0;
+               opcode = (0xed << 24) | (0x9 << 20) | (r12->id << 16) | (0x2 << 10) | (SIZE << 8) | 0;
        }
 
        opcode |= (D << 22) | (V << 12);
@@ -1130,52 +1221,73 @@ scf_instruction_t* arm32_inst_CVTUI2F(scf_3ac_code_t* c, scf_register_t* rd, scf
        return inst;
 }
 
-scf_instruction_t* arm32_inst_SUB_IMM(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* arm32_inst_SUB_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
+       scf_register_t*    r12;
        uint32_t           opcode;
        uint32_t           sh = 0;
 
-       if (imm > 0xff) {
-               scf_loge("NOT support too big imm: %#lx\n", imm);
-               return NULL;
+       if (imm <= 0xff)
+               opcode = (0xe2 << 24) | (0x4 << 20) | (rs->id << 16) | (rd->id << 12) | imm;
+       else {
+               r12 = f->rops->find_register("x12");
+
+               int ret = arm32_inst_I2G(c, r12, imm, 4);
+               if (ret < 0)
+                       return NULL;
+
+               opcode = (0xe0 << 24) | (0x4 << 20) | (rs->id << 16) | (rd->id << 12) | r12->id;
        }
 
-       opcode = (0xe2 << 24) | (0x4 << 20) | (rs->id << 16) | (rd->id << 12) | imm;
-       inst   = risc_make_inst(c, opcode);
+       inst = risc_make_inst(c, opcode);
 
        return inst;
 }
 
-scf_instruction_t* arm32_inst_CMP_IMM(scf_3ac_code_t* c, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* arm32_inst_CMP_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
+       scf_register_t*    r12;
        uint32_t           opcode;
        uint32_t           sh = 0;
 
-       if (imm > 0xff) {
-               scf_loge("NOT support too big imm: %#lx\n", imm);
-               return NULL;
+       if (imm <= 0xff)
+               opcode = (0xe3 << 24) | (0x5 << 20) | (rs->id << 16) | imm;
+       else {
+               r12 = f->rops->find_register("x12");
+
+               int ret = arm32_inst_I2G(c, r12, imm, 4);
+               if (ret < 0)
+                       return NULL;
+
+               opcode = (0xe1 << 24) | (0x5 << 20) | (rs->id << 16) | r12->id;
        }
 
-       opcode = (0xe3 << 24) | (0x5 << 20) | (rs->id << 16) | imm;
        inst   = risc_make_inst(c, opcode);
 
        return inst;
 }
 
-scf_instruction_t* arm32_inst_ADD_IMM(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* arm32_inst_ADD_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
+       scf_register_t*    r12;
        uint32_t           opcode;
        uint32_t           sh = 0;
 
-       if (imm > 0xff) {
-               scf_loge("NOT support too big imm: %#lx\n", imm);
-               return NULL;
+       if (imm <= 0xff)
+               opcode = (0xe2 << 24) | (0x8 << 20) | (rs->id << 16) | (rd->id << 12) | imm;
+       else {
+               r12 = f->rops->find_register("x12");
+
+               int ret = arm32_inst_I2G(c, r12, imm, 4);
+               if (ret < 0)
+                       return NULL;
+
+               opcode = (0xe0 << 24) | (0x8 << 20) | (rs->id << 16) | r12->id;
        }
 
-       opcode = (0xe2 << 24) | (0x8 << 20) | (rs->id << 16) | (rd->id << 12) | imm;
        inst   = risc_make_inst(c, opcode);
 
        return inst;
@@ -1186,8 +1298,19 @@ scf_instruction_t* arm32_inst_ADD_G(scf_3ac_code_t* c, scf_register_t* rd, scf_r
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe0 << 24) | (0x8 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe0 << 24) | (0x8 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               opcode = (0xe0 << 24) | (0x9 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe0 << 24) | (0xa << 20) | ((rs0->id + 1) << 16) | ((rd->id + 1) << 12) | (rs1->id + 1);
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1195,10 +1318,41 @@ scf_instruction_t* arm32_inst_ADD_G(scf_3ac_code_t* c, scf_register_t* rd, scf_r
 scf_instruction_t* arm32_inst_SHL(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1)
 {
        scf_instruction_t* inst;
+       scf_register_t*    lr;
        uint32_t           opcode;
 
-       opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x1 << 4) | rs0->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x1 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               lr       = arm32_find_register("lr");
+               lr->used = 1;
+
+               opcode = (0xe2 << 24) | (0x4 << 20) | (rs1->id << 16) | (12 << 12) | 32; // r12 = rs1 - 32
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe2 << 24) | (0x6 << 20) | (rs1->id << 16) | (14 << 12) | 32; // r14 = 32 - rs1
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0xa << 20) | ((rd->id + 1) << 12) | (rs1->id << 8) | (0x1 << 4) | (rs0->id + 1);
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0x8 << 20) | ((rd->id + 1) << 16) | ((rd->id + 1) << 12) | (12 << 8) | (0x1 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0x8 << 20) | ((rd->id + 1) << 16) | ((rd->id + 1) << 12) | (14 << 8) | (0x1 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x1 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1206,10 +1360,41 @@ scf_instruction_t* arm32_inst_SHL(scf_3ac_code_t* c, scf_register_t* rd, scf_reg
 scf_instruction_t* arm32_inst_SHR(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1)
 {
        scf_instruction_t* inst;
+       scf_register_t*    lr;
        uint32_t           opcode;
 
-       opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x3 << 4) | rs0->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x3 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               lr       = arm32_find_register("lr");
+               lr->used = 1;
+
+               opcode = (0xe2 << 24) | (0x6 << 20) | (rs1->id << 16) | (14 << 12) | 32; // r14 = 32 - rs1
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe2 << 24) | (0x5 << 20) | (rs1->id << 16) | (12 << 12) | 32; // r12 = rs1 - 32
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x3 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0x8 << 20) | (rd->id << 16) | (rd->id << 12) | (14 << 8) | (0x1 << 4) | (rs0->id + 1);
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0x8 << 20) | (rd->id << 16) | (rd->id << 12) | (12 << 8) | (0x3 << 4) | (rs0->id + 1);
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0xa << 20) | ((rd->id + 1) << 12) | (rs1->id << 8) | (0x3 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1217,10 +1402,41 @@ scf_instruction_t* arm32_inst_SHR(scf_3ac_code_t* c, scf_register_t* rd, scf_reg
 scf_instruction_t* arm32_inst_ASR(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1)
 {
        scf_instruction_t* inst;
+       scf_register_t*    lr;
        uint32_t           opcode;
 
-       opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x5 << 4) | rs0->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x5 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               lr       = arm32_find_register("lr");
+               lr->used = 1;
+
+               opcode = (0xe2 << 24) | (0x6 << 20) | (rs1->id << 16) | (14 << 12) | 32; // r14 = 32 - rs1
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe2 << 24) | (0x5 << 20) | (rs1->id << 16) | (12 << 12) | 32; // r12 = rs1 - 32
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0xa << 20) | (rd->id << 12) | (rs1->id << 8) | (0x3 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0x8 << 20) | (rd->id << 16) | (rd->id << 12) | (14 << 8) | (0x1 << 4) | (rs0->id + 1);
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0x8 << 20) | (rd->id << 16) | (rd->id << 12) | (12 << 8) | (0x5 << 4) | (rs0->id + 1);
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0xa << 20) | ((rd->id + 1) << 12) | (rs1->id << 8) | (0x5 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1230,8 +1446,19 @@ scf_instruction_t* arm32_inst_AND_G(scf_3ac_code_t* c, scf_register_t* rd, scf_r
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe0 << 24) | (0x0 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe0 << 24) | (0x0 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               opcode = (0xe0 << 24) | (0x0 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe0 << 24) | (0x0 << 20) | ((rs0->id + 1) << 16) | ((rd->id + 1) << 12) | (rs1->id + 1);
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1241,8 +1468,19 @@ scf_instruction_t* arm32_inst_OR_G(scf_3ac_code_t* c, scf_register_t* rd, scf_re
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe1 << 24) | (0x8 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe1 << 24) | (0x8 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               opcode = (0xe1 << 24) | (0x8 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe1 << 24) | (0x8 << 20) | ((rs0->id + 1) << 16) | ((rd->id + 1) << 12) | (rs1->id + 1);
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1252,8 +1490,19 @@ scf_instruction_t* arm32_inst_SUB_G(scf_3ac_code_t* c, scf_register_t* rd, scf_r
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe0 << 24) | (0x4 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe0 << 24) | (0x4 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               opcode = (0xe0 << 24) | (0x5 << 20) | (rs0->id << 16) | (rd->id << 12) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe0 << 24) | (0xc << 20) | ((rs0->id + 1) << 16) | ((rd->id + 1) << 12) | (rs1->id + 1);
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1263,8 +1512,19 @@ scf_instruction_t* arm32_inst_CMP_G(scf_3ac_code_t* c, scf_register_t* rs0, scf_
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe1 << 24) | (0x5 << 20) | (rs0->id << 16) | rs1->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rs0->bytes < 8) {
+
+               opcode = (0xe1 << 24) | (0x5 << 20) | (rs0->id << 16) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               opcode = (0xe1 << 24) | (0x5 << 20) | (rs0->id << 16) | rs1->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe0 << 24) | (0xd << 20) | ((rs0->id + 1) << 16) | (12 << 12) | (rs1->id + 1);
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1309,8 +1569,19 @@ scf_instruction_t* arm32_inst_NEG(scf_3ac_code_t* c, scf_register_t* rd, scf_reg
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe1 << 24) | (0x3 << 20) | (rs->id << 16) | rs->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rs->bytes < 8) {
+
+               opcode = (0xe2 << 24) | (0x6 << 20) | (rs->id << 16) | (rd->id << 12);
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               opcode = (0xe2 << 24) | (0x7 << 20) | (rs->id << 16) | (rd->id << 12);
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe0 << 24) | (0xe << 20) | ((rs->id + 1) << 16) | ((rd->id + 1) << 12);
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1320,9 +1591,12 @@ scf_instruction_t* arm32_inst_TEQ(scf_3ac_code_t* c, scf_register_t* rs)
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe1 << 24) | (0x3 << 20) | (rs->id << 16) | rs->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rs->bytes < 8)
+               opcode = (0xe1 << 24) | (0x3 << 20) | (rs->id << 16) | rs->id;
+       else
+               opcode = (0xe1 << 24) | (0x9 << 20) | ((rs->id + 1) << 16) | (12 << 12) | rs->id;
 
+       inst = risc_make_inst(c, opcode);
        return inst;
 }
 
@@ -1417,8 +1691,27 @@ scf_instruction_t* arm32_inst_MUL(scf_3ac_code_t* c, scf_register_t* rd, scf_reg
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe0 << 24) | (rd->id << 16) | (rs1->id << 8) | (0x9 << 4) | rs0->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe0 << 24) | (rd->id << 16) | (rs1->id << 8) | (0x9 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               opcode = (0xe0 << 24) | ((rd->id + 1) << 16) | ((rs1->id + 1) << 8) | (0x9 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe0 << 24) | (0x2 << 20) | ((rd->id + 1) << 16) | ((rd->id + 1) << 12) | (rs1->id << 8) | (0x9 << 4) | (rs0->id + 1);
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe0 << 24) | (0x8 << 20) | (12 << 16) | (rd->id << 12) | (rs1->id << 8) | (0x9 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+               ARM32_INST_ADD_CHECK(c, inst);
+
+               opcode = (0xe0 << 24) | (0x8 << 20) | ((rd->id + 1) << 16) | ((rd->id + 1) << 12) | 12;
+               inst   = risc_make_inst(c, opcode);
+       }
 
        return inst;
 }
@@ -1514,8 +1807,15 @@ scf_instruction_t* arm32_inst_DIV(scf_3ac_code_t* c, scf_register_t* rd, scf_reg
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe7 << 24) | (0x3 << 20) | (rd->id << 16) | (0xf << 12) | (rs1->id << 8) | (0x1 << 4) | rs0->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe7 << 24) | (0x3 << 20) | (rd->id << 16) | (0xf << 12) | (rs1->id << 8) | (0x1 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               scf_loge("\n");
+               return NULL;
+       }
 
        return inst;
 }
@@ -1525,8 +1825,15 @@ scf_instruction_t* arm32_inst_SDIV(scf_3ac_code_t* c, scf_register_t* rd, scf_re
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe7 << 24) | (0x1 << 20) | (rd->id << 16) | (0xf << 12) | (rs1->id << 8) | (0x1 << 4) | rs0->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe7 << 24) | (0x1 << 20) | (rd->id << 16) | (0xf << 12) | (rs1->id << 8) | (0x1 << 4) | rs0->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               scf_loge("\n");
+               return NULL;
+       }
 
        return inst;
 }
@@ -1536,8 +1843,15 @@ scf_instruction_t* arm32_inst_MSUB(scf_3ac_code_t* c, scf_register_t* rd, scf_re
        scf_instruction_t* inst;
        uint32_t           opcode;
 
-       opcode = (0xe0 << 24) | (0x6 << 20) | (rd->id << 16) | (ra->id << 12) | (rm->id << 8) | (0x9 << 4) | rn->id;
-       inst   = risc_make_inst(c, opcode);
+       if (rd->bytes < 8) {
+
+               opcode = (0xe0 << 24) | (0x6 << 20) | (rd->id << 16) | (ra->id << 12) | (rm->id << 8) | (0x9 << 4) | rn->id;
+               inst   = risc_make_inst(c, opcode);
+
+       } else {
+               scf_loge("\n");
+               return NULL;
+       }
 
        return inst;
 }
index b23801b968a374ca52589470fcad0377fe9934f4..a648800f542aea3d49d8fc85c0be7a72c0b0ccb0 100644 (file)
@@ -1013,7 +1013,7 @@ scf_instruction_t* arm64_inst_CVTUI2F(scf_3ac_code_t* c, scf_register_t* rd, scf
        return inst;
 }
 
-scf_instruction_t* arm64_inst_SUB_IMM(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* arm64_inst_SUB_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
        uint32_t           opcode;
@@ -1037,7 +1037,7 @@ scf_instruction_t* arm64_inst_SUB_IMM(scf_3ac_code_t* c, scf_register_t* rd, scf
        return inst;
 }
 
-scf_instruction_t* arm64_inst_CMP_IMM(scf_3ac_code_t* c, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* arm64_inst_CMP_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
        uint32_t           opcode;
@@ -1061,7 +1061,7 @@ scf_instruction_t* arm64_inst_CMP_IMM(scf_3ac_code_t* c, scf_register_t* rs, uin
        return inst;
 }
 
-scf_instruction_t* arm64_inst_ADD_IMM(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* arm64_inst_ADD_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
        uint32_t           opcode;
index 40d0ea4e43de7295e07f71db12de91e1b806d1ce..37cf9d073ad750854ec5887b97ef62e0dba148ad 100644 (file)
@@ -868,7 +868,7 @@ scf_instruction_t* naja_inst_CVTUI2F(scf_3ac_code_t* c, scf_register_t* rd, scf_
        return inst;
 }
 
-scf_instruction_t* naja_inst_SUB_IMM(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* naja_inst_SUB_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
        uint32_t           opcode;
@@ -884,7 +884,7 @@ scf_instruction_t* naja_inst_SUB_IMM(scf_3ac_code_t* c, scf_register_t* rd, scf_
        return inst;
 }
 
-scf_instruction_t* naja_inst_CMP_IMM(scf_3ac_code_t* c, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* naja_inst_CMP_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
        uint32_t           opcode;
@@ -900,7 +900,7 @@ scf_instruction_t* naja_inst_CMP_IMM(scf_3ac_code_t* c, scf_register_t* rs, uint
        return inst;
 }
 
-scf_instruction_t* naja_inst_ADD_IMM(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
+scf_instruction_t* naja_inst_ADD_IMM(scf_3ac_code_t* c, scf_function_t* f, scf_register_t* rd, scf_register_t* rs, uint64_t imm)
 {
        scf_instruction_t* inst;
        uint32_t           opcode;
index 5f46cdba81a1b14f32b6ee824a282061f02377cb..75318425f2eff210ea139ed854a1269ad2d6bd5b 100644 (file)
@@ -77,54 +77,6 @@ int scf_risc_close(scf_native_t* ctx)
        return 0;
 }
 
-static void _risc_argv_rabi(scf_function_t* f)
-{
-       scf_variable_t* v;
-
-       f->args_int   = 0;
-       f->args_float = 0;
-
-       int bp_int    = -8;
-       int bp_floats = -8 - (int)f->rops->ABI_NB * 8;
-       int bp_others = 16;
-
-       int i;
-       for (i = 0; i < f->argv->size; i++) {
-               v  =        f->argv->data[i];
-
-               if (!v->arg_flag) {
-                       v ->arg_flag = 1;
-                       assert(f->inline_flag);
-               }
-
-               int is_float =      scf_variable_float(v);
-               int size     = f->rops->variable_size (v);
-
-               if (is_float) {
-
-                       if (f->args_float < f->rops->ABI_NB) {
-
-                               v->rabi       = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_float_regs[f->args_float], size);
-                               v->bp_offset  = bp_floats;
-                               bp_floats    -= 8;
-                               f->args_float++;
-                               continue;
-                       }
-               } else if (f->args_int < f->rops->ABI_NB) {
-
-                       v->rabi       = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_regs[f->args_int], size);
-                       v->bp_offset  = bp_int;
-                       bp_int       -= 8;
-                       f->args_int++;
-                       continue;
-               }
-
-               v->rabi       = NULL;
-               v->bp_offset  = bp_others;
-               bp_others    += 8;
-       }
-}
-
 static int _risc_function_init(scf_function_t* f, scf_vector_t* local_vars)
 {
        scf_variable_t* v;
@@ -140,7 +92,7 @@ static int _risc_function_init(scf_function_t* f, scf_vector_t* local_vars)
                v->bp_offset = 0;
        }
 
-       _risc_argv_rabi(f);
+       f->rops->argv_rabi(f);
 
        int local_vars_size = 8 + f->rops->ABI_NB * 8 * 2;
 
@@ -232,12 +184,18 @@ static int _risc_save_rabi(scf_function_t* f)
 
 static int _risc_function_finish(scf_native_t* ctx, scf_function_t* f)
 {
-       if (!f->init_insts) {
-               f->init_insts = scf_vector_alloc();
-               if (!f->init_insts)
-                       return -ENOMEM;
-       } else
-               scf_vector_clear(f->init_insts, free);
+       assert(!f->init_code);
+
+       f->init_code = scf_3ac_code_alloc();
+       if (!f->init_code)
+               return -ENOMEM;
+
+       f->init_code->instructions = scf_vector_alloc();
+
+       if (!f->init_code->instructions) {
+               scf_3ac_code_free(f->init_code);
+               return -ENOMEM;
+       }
 
        scf_register_t* sp   = f->rops->find_register("sp");
        scf_register_t* fp   = f->rops->find_register("fp");
@@ -249,11 +207,11 @@ static int _risc_function_finish(scf_native_t* ctx, scf_function_t* f)
        if (f->bp_used_flag) {
 
                inst   = ctx->iops->PUSH(NULL, fp);
-               RISC_INST_ADD_CHECK(f->init_insts, inst);
+               RISC_INST_ADD_CHECK(f->init_code->instructions, inst);
                f->init_code_bytes  = inst->len;
 
                inst   = ctx->iops->MOV_SP(NULL, fp, sp);
-               RISC_INST_ADD_CHECK(f->init_insts, inst);
+               RISC_INST_ADD_CHECK(f->init_code->instructions, inst);
                f->init_code_bytes += inst->len;
 
                uint32_t local = f->local_vars_size;
@@ -273,8 +231,8 @@ static int _risc_function_finish(scf_native_t* ctx, scf_function_t* f)
                        local <<= 12;
                }
 
-               inst   = ctx->iops->SUB_IMM(NULL, sp, sp, local);
-               RISC_INST_ADD_CHECK(f->init_insts, inst);
+               inst   = ctx->iops->SUB_IMM(f->init_code, f, sp, sp, local);
+               RISC_INST_ADD_CHECK(f->init_code->instructions, inst);
                f->init_code_bytes += inst->len;
 
                int ret = _risc_save_rabi(f);
@@ -284,23 +242,9 @@ static int _risc_function_finish(scf_native_t* ctx, scf_function_t* f)
        } else
                f->init_code_bytes = 0;
 
-       int i;
-       for (i = 0; i < f->rops->ABI_CALLEE_SAVES_NB; i++) {
-
-               r  = f->rops->find_register_type_id_bytes(0, f->rops->abi_callee_saves[i], 8);
-
-               if (!r->used) {
-                       r  = f->rops->find_register_type_id_bytes(0, f->rops->abi_callee_saves[i], 4);
-
-                       if (!r->used)
-                               continue;
-               }
-
-               inst   = ctx->iops->PUSH(NULL, r);
-               RISC_INST_ADD_CHECK(f->init_insts, inst);
-
-               f->init_code_bytes += inst->len;
-       }
+       int ret = f->rops->push_callee_regs(f->init_code, f);
+       if (ret < 0)
+               return ret;
 
        f->rops->registers_clear();
        return 0;
@@ -473,8 +417,7 @@ static int _risc_argv_save(scf_basic_block_t* bb, scf_function_t* f)
                        active    = bb->dn_colors_entry->data[j];
                        dn2       = active->dag_node;
 
-                       if (dn2 != dn && dn2->color > 0
-                                       && RISC_COLOR_CONFLICT(dn2->color, rabi->color)) {
+                       if (dn2 != dn && dn2->color > 0 && f->rops->color_conflict(dn2->color, rabi->color)) {
                                save_flag = 1;
                                break;
                        }
index 6765e791fc40b7b683734b34db851d72401a14fa..aa2f63c6a678c7d8003531c72a001645c4a3aee0 100644 (file)
@@ -24,14 +24,14 @@ static intptr_t _risc_color_select(scf_graph_node_t* node, scf_vector_t* colors,
        return 0;
 }
 
-static int _risc_color_del(scf_vector_t* colors, intptr_t color)
+static int _risc_color_del(scf_vector_t* colors, intptr_t color, scf_function_t* f)
 {
        int i = 0;
 
        while (i < colors->size) {
                intptr_t c = (intptr_t)(colors->data[i]);
 
-               if (RISC_COLOR_CONFLICT(c, color)) {
+               if (f->rops->color_conflict(c, color)) {
                        int ret = scf_vector_del(colors, (void*)c);
                        if (ret < 0)
                                return ret;
@@ -135,11 +135,11 @@ static int _risc_kcolor_fill(scf_graph_t* graph, int k, scf_vector_t* colors,
                        scf_graph_node_t* neighbor = node->neighbors->data[j];
 
                        if (neighbor->color > 0) {
-                               int ret = _risc_color_del(colors2, neighbor->color);
+                               int ret = _risc_color_del(colors2, neighbor->color, f);
                                if (ret < 0)
                                        goto error;
 
-                               if (RISC_COLOR_CONFLICT(node->color, neighbor->color)) {
+                               if (f->rops->color_conflict(node->color, neighbor->color)) {
                                        scf_logd("node: %p, neighbor: %p, color: %#lx:%#lx\n", node, neighbor, node->color, neighbor->color);
                                        scf_logd("node: %p, dn: %p, reg: %p\n", node, rn->dag_node, rn->reg);
                                        //assert(!rn->reg);
@@ -277,7 +277,7 @@ static scf_graph_node_t* _risc_max_neighbors(scf_graph_t* graph)
        return node_max;
 }
 
-static void _risc_kcolor_process_conflict(scf_graph_t* graph)
+static void _risc_kcolor_process_conflict(scf_graph_t* graph, scf_function_t* f)
 {
        int i;
        int j;
@@ -301,7 +301,7 @@ static void _risc_kcolor_process_conflict(scf_graph_t* graph)
                        if (0 == gn1->color)
                                continue;
 
-                       if (!RISC_COLOR_CONFLICT(gn0->color, gn1->color))
+                       if (!f->rops->color_conflict(gn0->color, gn1->color))
                                continue;
 
                        if (!rn0->dag_node) {
@@ -400,7 +400,7 @@ static int _risc_graph_kcolor(scf_graph_t* graph, int k, scf_vector_t* colors, s
                        intptr_t mask  = (1 << reg_size1) - 1;
                        node1->color   = RISC_COLOR(type, id, mask);
 
-                       ret = _risc_color_del(colors2, node0->color);
+                       ret = _risc_color_del(colors2, node0->color, f);
                        if (ret < 0) {
                                scf_loge("\n");
                                goto error;
@@ -419,7 +419,7 @@ static int _risc_graph_kcolor(scf_graph_t* graph, int k, scf_vector_t* colors, s
 
                        node0->color   = RISC_COLOR(type, id, mask);
 
-                       ret = _risc_color_del(colors2, node1->color);
+                       ret = _risc_color_del(colors2, node1->color, f);
                        if (ret < 0) {
                                scf_loge("\n");
                                goto error;
@@ -494,7 +494,7 @@ int scf_risc_graph_kcolor(scf_graph_t* graph, int k, scf_vector_t* colors, scf_f
                return -EINVAL;
        }
 
-       _risc_kcolor_process_conflict(graph);
+       _risc_kcolor_process_conflict(graph, f);
 
        return _risc_graph_kcolor(graph, k, colors, f);
 }
index 560275f1c5f6fd0fbc1978e244f5d408a0200adb..c403ea89117dcac9f6486b8c4a6df829f90e8f38 100644 (file)
@@ -147,7 +147,7 @@ static int _risc_inst_call_argv(scf_native_t* ctx, scf_3ac_code_t* c, scf_functi
                if (!rs) {
                        assert(src->dag_node->color > 0);
 
-                       if (rd && RISC_COLOR_CONFLICT(rd->color, src->dag_node->color)) {
+                       if (rd && f->rops->color_conflict(rd->color, src->dag_node->color)) {
 
                                ret = f->rops->overflow_reg2(rd, src->dag_node, c, f);
                                if (ret < 0) {
@@ -193,7 +193,7 @@ static int _risc_inst_call_argv(scf_native_t* ctx, scf_3ac_code_t* c, scf_functi
                        return ret;
                }
 
-               if (!RISC_COLOR_CONFLICT(rd->color, rs->color)) {
+               if (!f->rops->color_conflict(rd->color, rs->color)) {
                        rd     = f->rops->find_register_color_bytes(rd->color, rs->bytes);
 
                        if (!is_float)
@@ -252,7 +252,7 @@ static int _risc_dst_reg_valid(scf_function_t* f, scf_register_t* rd, scf_regist
 
                r  = updated_regs[i];
 
-               if (RISC_COLOR_CONFLICT(r->color, rd->color))
+               if (f->rops->color_conflict(r->color, rd->color))
                        return 0;
        }
 
@@ -260,7 +260,7 @@ static int _risc_dst_reg_valid(scf_function_t* f, scf_register_t* rd, scf_regist
 
                r  = f->rops->find_register_type_id_bytes(RISC_COLOR_TYPE(rd->color), f->rops->abi_ret_regs[i], rd->bytes);
 
-               if (RISC_COLOR_CONFLICT(r->color, rd->color))
+               if (f->rops->color_conflict(r->color, rd->color))
                        return 0;
        }
 
@@ -463,7 +463,7 @@ static int _risc_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                return ret;
        }
 
-       risc_call_rabi(NULL, NULL, c, f);
+       f->rops->call_rabi(c, f, NULL, NULL, NULL);
 
        int32_t stack_size = _risc_inst_call_stack_size(c, f);
        if (stack_size > 0) {
@@ -503,7 +503,7 @@ static int _risc_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                        }
                }
 
-               inst = ctx->iops->SUB_IMM(c, sp, sp, stack_size);
+               inst = ctx->iops->SUB_IMM(c, f, sp, sp, stack_size);
                if (inst) {
                        memcpy(inst_sp->code, inst->code, 4);
                        free(inst);
@@ -517,7 +517,7 @@ static int _risc_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                }
 
                if (save_size > 0) {
-                       inst = ctx->iops->SUB_IMM(c, sp, sp, save_size);
+                       inst = ctx->iops->SUB_IMM(c, f, sp, sp, save_size);
                        if (inst) {
                                memcpy(inst_sp2->code, inst->code, 4);
                                free(inst);
@@ -575,7 +575,7 @@ static int _risc_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        }
 
        if (stack_size > 0) {
-               inst = ctx->iops->ADD_IMM(c, sp, sp, stack_size);
+               inst = ctx->iops->ADD_IMM(c, f, sp, sp, stack_size);
                RISC_INST_ADD_CHECK(c->instructions, inst);
        }
 
@@ -684,7 +684,7 @@ static int _risc_inst_inc_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
        RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1);
 
-       inst = ctx->iops->ADD_IMM(c, rs, rs, 1);
+       inst = ctx->iops->ADD_IMM(c, f, rs, rs, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        return 0;
@@ -729,7 +729,7 @@ static int _risc_inst_inc_post_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        inst = ctx->iops->MOV_G(c, rd, rs);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
-       inst   = ctx->iops->ADD_IMM(c, rs, rs, 1);
+       inst   = ctx->iops->ADD_IMM(c, f, rs, rs, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
        return 0;
 }
@@ -761,7 +761,7 @@ static int _risc_inst_dec_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
        RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1);
 
-       inst = ctx->iops->SUB_IMM(c, rs, rs, 1);
+       inst = ctx->iops->SUB_IMM(c, f, rs, rs, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        return 0;
@@ -806,7 +806,7 @@ static int _risc_inst_dec_post_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        inst = ctx->iops->MOV_G(c, rd, rs);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
-       inst = ctx->iops->SUB_IMM(c, rs, rs, 1);
+       inst = ctx->iops->SUB_IMM(c, f, rs, rs, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
        return 0;
 }
@@ -1027,7 +1027,7 @@ static int _risc_inst_inc_pointer_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->ADD_IMM(c, r, r, 1);
+       inst   = ctx->iops->ADD_IMM(c, f, r, r, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        if (sib.index)
@@ -1094,7 +1094,7 @@ static int _risc_inst_dec_pointer_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->SUB_IMM(c, r, r, 1);
+       inst   = ctx->iops->SUB_IMM(c, f, r, r, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        if (sib.index)
@@ -1167,7 +1167,7 @@ static int _risc_inst_inc_post_pointer_handler(scf_native_t* ctx, scf_3ac_code_t
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->ADD_IMM(c, rd, rd, 1);
+       inst   = ctx->iops->ADD_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        if (sib.index)
@@ -1177,7 +1177,7 @@ static int _risc_inst_inc_post_pointer_handler(scf_native_t* ctx, scf_3ac_code_t
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->SUB_IMM(c, rd, rd, 1);
+       inst   = ctx->iops->SUB_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
        return 0;
 }
@@ -1245,7 +1245,7 @@ static int _risc_inst_dec_post_pointer_handler(scf_native_t* ctx, scf_3ac_code_t
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->SUB_IMM(c, rd, rd, 1);
+       inst   = ctx->iops->SUB_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        if (sib.index)
@@ -1255,7 +1255,7 @@ static int _risc_inst_dec_post_pointer_handler(scf_native_t* ctx, scf_3ac_code_t
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->ADD_IMM(c, rd, rd, 1);
+       inst   = ctx->iops->ADD_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
        return 0;
 }
@@ -1366,7 +1366,7 @@ static int _risc_inst_inc_array_index_handler(scf_native_t* ctx, scf_3ac_code_t*
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->ADD_IMM(c, r, r, 1);
+       inst   = ctx->iops->ADD_IMM(c, f, r, r, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        if (sib.index)
@@ -1433,7 +1433,7 @@ static int _risc_inst_dec_array_index_handler(scf_native_t* ctx, scf_3ac_code_t*
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->SUB_IMM(c, r, r, 1);
+       inst   = ctx->iops->SUB_IMM(c, f, r, r, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        if (sib.index)
@@ -1504,7 +1504,7 @@ static int _risc_inst_inc_post_array_index_handler(scf_native_t* ctx, scf_3ac_co
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->ADD_IMM(c, rd, rd, 1);
+       inst   = ctx->iops->ADD_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        if (sib.index)
@@ -1514,7 +1514,7 @@ static int _risc_inst_inc_post_array_index_handler(scf_native_t* ctx, scf_3ac_co
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->SUB_IMM(c, rd, rd, 1);
+       inst   = ctx->iops->SUB_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
        return 0;
 }
@@ -1580,7 +1580,7 @@ static int _risc_inst_dec_post_array_index_handler(scf_native_t* ctx, scf_3ac_co
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->SUB_IMM(c, rd, rd, 1);
+       inst   = ctx->iops->SUB_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        if (sib.index)
@@ -1590,7 +1590,7 @@ static int _risc_inst_dec_post_array_index_handler(scf_native_t* ctx, scf_3ac_co
        if (ret < 0)
                return ret;
 
-       inst   = ctx->iops->ADD_IMM(c, rd, rd, 1);
+       inst   = ctx->iops->ADD_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
        return 0;
 }
@@ -2499,7 +2499,7 @@ static int _risc_inst_add_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                RISC_SELECT_REG_CHECK(&rd, d,  c, f, 0);
                RISC_SELECT_REG_CHECK(&rn, s0, c, f, 1);
 
-               inst   = ctx->iops->ADD_IMM(c, rd, rn, u);
+               inst   = ctx->iops->ADD_IMM(c, f, rd, rn, u);
                RISC_INST_ADD_CHECK(c->instructions, inst);
                return 0;
        }
@@ -2588,7 +2588,7 @@ static int _risc_inst_add_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
                RISC_SELECT_REG_CHECK(&rd, d,  c, f, 0);
 
-               inst   = ctx->iops->ADD_IMM(c, rd, rd, u);
+               inst   = ctx->iops->ADD_IMM(c, f, rd, rd, u);
                RISC_INST_ADD_CHECK(c->instructions, inst);
                return 0;
        }
@@ -2676,7 +2676,7 @@ static int _risc_inst_sub_assign_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
                RISC_SELECT_REG_CHECK(&rd, d,  c, f, 0);
 
-               inst   = ctx->iops->SUB_IMM(c, rd, rd, u);
+               inst   = ctx->iops->SUB_IMM(c, f, rd, rd, u);
                RISC_INST_ADD_CHECK(c->instructions, inst);
                return 0;
        }
@@ -2756,7 +2756,7 @@ static int _risc_inst_sub_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                RISC_SELECT_REG_CHECK(&rd, d,  c, f, 0);
                RISC_SELECT_REG_CHECK(&rn, s0, c, f, 1);
 
-               inst   = ctx->iops->SUB_IMM(c, rd, rn, u);
+               inst   = ctx->iops->SUB_IMM(c, f, rd, rn, u);
                RISC_INST_ADD_CHECK(c->instructions, inst);
 
                if (neg) {
@@ -3232,10 +3232,10 @@ static int _risc_inst_cmp_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                uint64_t u = ds1->var->data.u64;
 
                if (u <= 0xfff)
-                       inst   = ctx->iops->CMP_IMM(c, rs0, u);
+                       inst   = ctx->iops->CMP_IMM(c, f, rs0, u);
 
                else if (0 == (u & 0xfff) && (u >> 12) <= 0xfff)
-                       inst   = ctx->iops->CMP_IMM(c, rs0, u);
+                       inst   = ctx->iops->CMP_IMM(c, f, rs0, u);
 
                else {
                        ds1->loaded =  0;
@@ -3578,7 +3578,7 @@ static int _risc_inst_return_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        if (!c->srcs || c->srcs->size < 1)
                return -EINVAL;
 
-       scf_risc_context_t*  risc = ctx->priv;
+       scf_risc_context_t*   risc  = ctx->priv;
        scf_function_t*       f     = risc->f;
        scf_3ac_operand_t*    src   = NULL;
        scf_variable_t*       v     = NULL;
@@ -3624,9 +3624,6 @@ static int _risc_inst_return_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                                v->global_flag       =  1;
                        }
 
-                       scf_loge("\n");
-                       return -1;
-
                } else {
                        rd = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_ret_regs[i], retsize);
 
@@ -3649,7 +3646,7 @@ static int _risc_inst_return_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
                        RISC_SELECT_REG_CHECK(&rs, src->dag_node, c, f, 1);
 
-                       if (!RISC_COLOR_CONFLICT(rd->color, rs->color)) {
+                       if (!f->rops->color_conflict(rd->color, rs->color)) {
 
                                int ret = risc_save_reg(rd, c, f);
                                if (ret < 0)
@@ -3787,23 +3784,10 @@ static int _risc_inst_end_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
        scf_register_t* sp  = f->rops->find_register("sp");
        scf_register_t* fp  = f->rops->find_register("fp");
-       scf_register_t* r;
-
-       int i;
-       for (i = f->rops->ABI_CALLEE_SAVES_NB - 1; i >= 0; i--) {
-
-               r  = f->rops->find_register_type_id_bytes(0, f->rops->abi_callee_saves[i], 8);
 
-               if (!r->used) {
-                       r  = f->rops->find_register_type_id_bytes(0, f->rops->abi_callee_saves[i], 4);
-
-                       if (!r->used)
-                               continue;
-               }
-
-               inst = ctx->iops->POP(c, r);
-               RISC_INST_ADD_CHECK(c->instructions, inst);
-       }
+       int ret = f->rops->pop_callee_regs(c, f);
+       if (ret < 0)
+               return ret;
 
        inst = ctx->iops->MOV_SP(c, sp, fp);
        RISC_INST_ADD_CHECK(c->instructions, inst);
@@ -5491,7 +5475,7 @@ static int _risc_inst_dec_dereference_handler(scf_native_t* ctx, scf_3ac_code_t*
        if (ret < 0)
                return ret;
 
-       inst = ctx->iops->SUB_IMM(c, r, r, 1);
+       inst = ctx->iops->SUB_IMM(c, f, r, r, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        return ctx->iops->G2P(c, f, r, sib.base, 0, size);
@@ -5536,7 +5520,7 @@ static int _risc_inst_inc_dereference_handler(scf_native_t* ctx, scf_3ac_code_t*
        if (ret < 0)
                return ret;
 
-       inst = ctx->iops->ADD_IMM(c, r, r, 1);
+       inst = ctx->iops->ADD_IMM(c, f, r, r, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        return ctx->iops->G2P(c, f, r, sib.base, 0, size);
@@ -5580,14 +5564,14 @@ static int _risc_inst_dec_post_dereference_handler(scf_native_t* ctx, scf_3ac_co
        if (ret < 0)
                return ret;
 
-       inst = ctx->iops->SUB_IMM(c, rd, rd, 1);
+       inst = ctx->iops->SUB_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        ret = ctx->iops->G2P(c, f, rd, sib.base, 0, size);
        if (ret < 0)
                return ret;
 
-       inst = ctx->iops->ADD_IMM(c, rd, rd, 1);
+       inst = ctx->iops->ADD_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
        return 0;
 }
@@ -5630,14 +5614,14 @@ static int _risc_inst_inc_post_dereference_handler(scf_native_t* ctx, scf_3ac_co
        if (ret < 0)
                return ret;
 
-       inst = ctx->iops->ADD_IMM(c, rd, rd, 1);
+       inst = ctx->iops->ADD_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
 
        ret = ctx->iops->G2P(c, f, rd, sib.base, 0, size);
        if (ret < 0)
                return ret;
 
-       inst = ctx->iops->SUB_IMM(c, rd, rd, 1);
+       inst = ctx->iops->SUB_IMM(c, f, rd, rd, 1);
        RISC_INST_ADD_CHECK(c->instructions, inst);
        return 0;
 }
index c106364d5b32eec888a4edc2c2cd8e9afacee507..f92ca675084445b82a8d52e737e3dcefcf1ca4cd 100644 (file)
@@ -346,10 +346,9 @@ static int _risc_rcg_call(scf_native_t* ctx, scf_3ac_code_t* c, scf_graph_t* g)
                }
        }
 
-       int nb_ints   = 0;
-       int nb_floats = 0;
+       int nb_ints = 0;
 
-       risc_call_rabi(&nb_ints, &nb_floats, c, f);
+       f->rops->call_rabi(c, f, &nb_ints, NULL, NULL);
 
        for (i  = 1; i < c->srcs->size; i++) {
                src =        c->srcs->data[i];
@@ -942,7 +941,11 @@ static int _risc_rcg_save_handler(scf_native_t* ctx, scf_3ac_code_t* c, scf_grap
 
 static int _risc_rcg_load_handler(scf_native_t* ctx, scf_3ac_code_t* c, scf_graph_t* g)
 {
-       return 0;
+       int ret = _risc_rcg_make2(c, NULL, NULL);
+       if (ret < 0)
+               return ret;
+
+       return risc_rcg_make(c, g, NULL, NULL);
 }
 static int _risc_rcg_nop_handler(scf_native_t* ctx, scf_3ac_code_t* c, scf_graph_t* g)
 {
index 47f1ca9aca5e9fd2358c649f4a4f96669d9f6cb9..23383a948693080f4686d5fc4ca7f11953d1b3e3 100644 (file)
@@ -10,6 +10,11 @@ int risc_save_var2(scf_dag_node_t* dn, scf_register_t* r, scf_3ac_code_t* c, scf
        int size     = f->rops->variable_size (v);
        int is_float =      scf_variable_float(v);
 
+       scf_loge("size: %d, r: %s, r->bytes: %d, is_float: %d\n", size, r->name, r->bytes, is_float);
+       if (v->w)
+               scf_logw("save var: v_%d_%d/%s, ", v->w->line, v->w->pos, v->w->text->data);
+       else
+               scf_logw("save var: v_%#lx, ", 0xffff & (uintptr_t)v);
        assert(size == r->bytes);
 
        if (scf_variable_const(v)) {
@@ -41,8 +46,10 @@ int risc_save_var2(scf_dag_node_t* dn, scf_register_t* r, scf_3ac_code_t* c, scf
 #endif
 
        int ret = f->iops->G2M(c, f, r, NULL, v);
-       if (ret < 0)
+       if (ret < 0) {
+               scf_loge("\n");
                return ret;
+       }
 
 end:
        // if this var is function argment, it become a normal local var
@@ -56,8 +63,10 @@ end:
 
 int risc_save_var(scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
 {
-       if (dn->color <= 0)
+       if (dn->color <= 0) {
+               scf_loge("\n");
                return -EINVAL;
+       }
 
        scf_register_t* r = f->rops->find_register_color(dn->color);
 
@@ -277,7 +286,8 @@ int risc_select_free_reg(scf_register_t** preg, scf_3ac_code_t* c, scf_function_
        }
        assert(0 == r->dag_nodes->size);
 
-       r = f->rops->find_register_type_id_bytes(0, r->id, 8);
+       r = f->rops->find_register_type_id_bytes(0, r->id, f->rops->MAX_BYTES);
+
        assert(0 == r->dag_nodes->size);
 
        ret = risc_rcg_make(c, c->rcg, NULL, r);
@@ -500,10 +510,10 @@ int risc_array_index_reg(scf_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* i
                        }
 
                        if (disp > 0 && disp <= 0xfff)
-                               inst = f->iops->ADD_IMM(c, rs, rb, disp);
+                               inst = f->iops->ADD_IMM(c, f, rs, rb, disp);
 
                        else if (disp < 0 && -disp <= 0xfff)
-                               inst = f->iops->SUB_IMM(c, rs, rb, -disp);
+                               inst = f->iops->SUB_IMM(c, f, rs, rb, -disp);
 
                        else {
                                ret = f->iops->I2G(c, rs, disp, 4);
@@ -519,10 +529,10 @@ int risc_array_index_reg(scf_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* i
                        assert(1 == s);
 
                        if (disp > 0 && disp <= 0xfff)
-                               inst = f->iops->ADD_IMM(c, rs, rb, disp);
+                               inst = f->iops->ADD_IMM(c, f, rs, rb, disp);
 
                        else if (disp < 0 && -disp <= 0xfff)
-                               inst = f->iops->SUB_IMM(c, rs, rb, -disp);
+                               inst = f->iops->SUB_IMM(c, f, rs, rb, -disp);
 
                        else {
                                ret = risc_select_free_reg(&rd, c, f, 0);
@@ -550,41 +560,4 @@ int risc_array_index_reg(scf_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* i
        return 0;
 }
 
-void risc_call_rabi(int* p_nints, int* p_nfloats, scf_3ac_code_t* c, scf_function_t* f)
-{
-       scf_3ac_operand_t* src = NULL;
-       scf_dag_node_t*    dn  = NULL;
-
-       int nfloats = 0;
-       int nints   = 0;
-       int i;
-
-       for (i  = 1; i < c->srcs->size; i++) {
-               src =        c->srcs->data[i];
-               dn  =        src->dag_node;
-
-               int is_float =      scf_variable_float(dn->var);
-               int size     = f->rops->variable_size (dn->var);
-
-               if (is_float) {
-                       if (nfloats   < f->rops->ABI_NB)
-                               dn->rabi2 = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_float_regs[nfloats++], size);
-                       else
-                               dn->rabi2 = NULL;
-               } else {
-                       if (nints     < f->rops->ABI_NB)
-                               dn->rabi2 = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_regs[nints++], size);
-                       else
-                               dn->rabi2 = NULL;
-               }
-
-               src->rabi = dn->rabi2;
-       }
-
-       if (p_nints)
-               *p_nints = nints;
-
-       if (p_nfloats)
-               *p_nfloats = nfloats;
-}
 
index abd1e689c3c23df537c97b6552972139a7d1c237..4a43cc77b5069f52d85b4c3b4df70c410b6ed41d 100644 (file)
@@ -8,7 +8,7 @@
 #define RISC_COLOR_TYPE(c)           ((c) >> 24)
 #define RISC_COLOR_ID(c)             (((c) >> 16) & 0xff)
 #define RISC_COLOR_MASK(c)           ((c) & 0xffff)
-#define RISC_COLOR_CONFLICT(c0, c1)  ( (c0) >> 16 == (c1) >> 16 && (c0) & (c1) & 0xffff )
+//#define RISC_COLOR_CONFLICT(c0, c1)  ( (c0) >> 16 == (c1) >> 16 && (c0) & (c1) & 0xffff )
 
 #define RISC_COLOR_BYTES(c) \
        ({ \
index 36108b1db076cd808d21ac6fd9c8d9d84644eb2a..c46d4eb423d6a18b43f71dfbb0b9d876743a3fb6 100644 (file)
@@ -10,6 +10,7 @@ scf_register_t        arm32_registers[] = {
        {0, 1, "b0",    RISC_COLOR(0, 0, 0x1),  NULL, 0, 0},
        {0, 2, "h0",    RISC_COLOR(0, 0, 0x3),  NULL, 0, 0},
        {0, 4, "x0",    RISC_COLOR(0, 0, 0xf),  NULL, 0, 0},
+       {0, 8, "iq0",   RISC_COLOR(0, 0, 0xff), NULL, 0, 0},
 
        {1, 1, "b1",    RISC_COLOR(0, 1, 0x1),  NULL, 0, 0},
        {1, 2, "h1",    RISC_COLOR(0, 1, 0x3),  NULL, 0, 0},
@@ -18,6 +19,7 @@ scf_register_t        arm32_registers[] = {
        {2, 1, "b2",    RISC_COLOR(0, 2, 0x1),  NULL, 0, 0},
        {2, 2, "h2",    RISC_COLOR(0, 2, 0x3),  NULL, 0, 0},
        {2, 4, "x2",    RISC_COLOR(0, 2, 0xf),  NULL, 0, 0},
+       {2, 8, "iq1",   RISC_COLOR(0, 2, 0xff), NULL, 0, 0},
 
        {3, 1, "b3",    RISC_COLOR(0, 3, 0x1),  NULL, 0, 0},
        {3, 2, "h3",    RISC_COLOR(0, 3, 0x3),  NULL, 0, 0},
@@ -26,6 +28,7 @@ scf_register_t        arm32_registers[] = {
        {4, 1, "b4",    RISC_COLOR(0, 4, 0x1),  NULL, 0, 0},
        {4, 2, "h4",    RISC_COLOR(0, 4, 0x3),  NULL, 0, 0},
        {4, 4, "x4",    RISC_COLOR(0, 4, 0xf),  NULL, 0, 0},
+       {4, 8, "iq2",   RISC_COLOR(0, 4, 0xff), NULL, 0, 0},
 
        {5, 1, "b5",    RISC_COLOR(0, 5, 0x1),  NULL, 0, 0},
        {5, 2, "h5",    RISC_COLOR(0, 5, 0x3),  NULL, 0, 0},
@@ -34,6 +37,7 @@ scf_register_t        arm32_registers[] = {
        {6, 1, "b6",    RISC_COLOR(0, 6, 0x1),  NULL, 0, 0},
        {6, 2, "h6",    RISC_COLOR(0, 6, 0x3),  NULL, 0, 0},
        {6, 4, "x6",    RISC_COLOR(0, 6, 0xf),  NULL, 0, 0},
+       {6, 8, "iq3",   RISC_COLOR(0, 6, 0xff), NULL, 0, 0},
 
        {7, 1, "b7",    RISC_COLOR(0, 7, 0x1),  NULL, 0, 0},
        {7, 2, "h7",    RISC_COLOR(0, 7, 0x3),  NULL, 0, 0},
@@ -42,10 +46,11 @@ scf_register_t      arm32_registers[] = {
        {8, 1, "b8",    RISC_COLOR(0, 8, 0x1),  NULL, 0, 0},
        {8, 2, "h8",    RISC_COLOR(0, 8, 0x3),  NULL, 0, 0},
        {8, 4, "x8",    RISC_COLOR(0, 8, 0xf),  NULL, 0, 0},
+       {8, 8, "iq4",   RISC_COLOR(0, 8, 0xff), NULL, 0, 0},
 
        {9, 1, "b9",    RISC_COLOR(0, 9, 0x1),  NULL, 0, 0},
        {9, 2, "h9",    RISC_COLOR(0, 9, 0x3),  NULL, 0, 0},
-       {9, 4, "x9",    RISC_COLOR(0, 9,  0xf),  NULL, 0, 0},
+       {9, 4, "x9",    RISC_COLOR(0, 9, 0xf),  NULL, 0, 0},
 
        {10, 1, "b10",  RISC_COLOR(0, 10, 0x1),  NULL, 0, 0},
        {10, 2, "h10",  RISC_COLOR(0, 10, 0x3),  NULL, 0, 0},
@@ -61,135 +66,70 @@ scf_register_t     arm32_registers[] = {
 
 //     {15, 4, "pc",   RISC_COLOR(0, 15, 0xf),  NULL, 0, 0},
 
-#if 0
-       {0, 2, "h0",    RISC_COLOR(1, 0, 0x3),  NULL, 0, 0},
-       {0, 4, "s0",    RISC_COLOR(1, 0, 0xf),  NULL, 0, 0},
-       {0, 8, "d0",    RISC_COLOR(1, 0, 0xff), NULL, 0, 0},
-
-       {1, 2, "h1",    RISC_COLOR(1, 1, 0x3),  NULL, 0, 0},
-       {1, 4, "s1",    RISC_COLOR(1, 1, 0xf),  NULL, 0, 0},
-       {1, 8, "d1",    RISC_COLOR(1, 1, 0xff), NULL, 0, 0},
-
-       {2, 2, "h2",    RISC_COLOR(1, 2, 0x3),  NULL, 0, 0},
-       {2, 4, "s2",    RISC_COLOR(1, 2, 0xf),  NULL, 0, 0},
-       {2, 8, "d2",    RISC_COLOR(1, 2, 0xff), NULL, 0, 0},
-
-       {3, 2, "h3",    RISC_COLOR(1, 3, 0x3),  NULL, 0, 0},
-       {3, 4, "s3",    RISC_COLOR(1, 3, 0xf),  NULL, 0, 0},
-       {3, 8, "d3",    RISC_COLOR(1, 3, 0xff), NULL, 0, 0},
-
-       {4, 2, "h4",    RISC_COLOR(1, 4, 0x3),  NULL, 0, 0},
-       {4, 4, "s4",    RISC_COLOR(1, 4, 0xf),  NULL, 0, 0},
-       {4, 8, "d4",    RISC_COLOR(1, 4, 0xff), NULL, 0, 0},
-
-       {5, 2, "h5",    RISC_COLOR(1, 5, 0x3),  NULL, 0, 0},
-       {5, 4, "s5",    RISC_COLOR(1, 5, 0xf),  NULL, 0, 0},
-       {5, 8, "d5",    RISC_COLOR(1, 5, 0xff), NULL, 0, 0},
-
-       {6, 2, "h6",    RISC_COLOR(1, 6, 0x3),  NULL, 0, 0},
-       {6, 4, "s6",    RISC_COLOR(1, 6, 0xf),  NULL, 0, 0},
-       {6, 8, "d6",    RISC_COLOR(1, 6, 0xff), NULL, 0, 0},
-
-       {7, 2, "h7",    RISC_COLOR(1, 7, 0x3),  NULL, 0, 0},
-       {7, 4, "s7",    RISC_COLOR(1, 7, 0xf),  NULL, 0, 0},
-       {7, 8, "d7",    RISC_COLOR(1, 7, 0xff), NULL, 0, 0},
-
-       {8, 2, "h8",    RISC_COLOR(1, 8, 0x3),  NULL, 0, 0},
-       {8, 4, "s8",    RISC_COLOR(1, 8, 0xf),  NULL, 0, 0},
-       {8, 8, "d8",    RISC_COLOR(1, 8, 0xff), NULL, 0, 0},
-
-       {9, 2, "h9",    RISC_COLOR(1, 9, 0x3),  NULL, 0, 0},
-       {9, 4, "s9",    RISC_COLOR(1, 9, 0xf),  NULL, 0, 0},
-       {9, 8, "d9",    RISC_COLOR(1, 9, 0xff), NULL, 0, 0},
 
-       {10, 2, "h10",    RISC_COLOR(1, 10, 0x3),  NULL, 0, 0},
-       {10, 4, "s10",    RISC_COLOR(1, 10, 0xf),  NULL, 0, 0},
-       {10, 8, "d10",    RISC_COLOR(1, 10, 0xff), NULL, 0, 0},
+       {0, 4, "s0",    RISC_COLOR(1, 0, 0xf ),  NULL, 0, 0},
+       {1, 4, "s1",    RISC_COLOR(1, 0, 0xf0),  NULL, 0, 0},
+       {0, 8, "d0",    RISC_COLOR(1, 0, 0xff),  NULL, 0, 0},
 
-       {11, 2, "h11",    RISC_COLOR(1, 11, 0x3),  NULL, 0, 0},
-       {11, 4, "s11",    RISC_COLOR(1, 11, 0xf),  NULL, 0, 0},
-       {11, 8, "d11",    RISC_COLOR(1, 11, 0xff), NULL, 0, 0},
+       {2, 4, "s2",    RISC_COLOR(1, 1, 0xf),   NULL, 0, 0},
+       {3, 4, "s3",    RISC_COLOR(1, 1, 0xf0),  NULL, 0, 0},
+       {1, 8, "d1",    RISC_COLOR(1, 1, 0xff),  NULL, 0, 0},
 
-       {12, 2, "h12",    RISC_COLOR(1, 12, 0x3),  NULL, 0, 0},
-       {12, 4, "s12",    RISC_COLOR(1, 12, 0xf),  NULL, 0, 0},
-       {12, 8, "d12",    RISC_COLOR(1, 12, 0xff), NULL, 0, 0},
+       {4, 4, "s4",    RISC_COLOR(1, 2, 0xf),   NULL, 0, 0},
+       {5, 4, "s5",    RISC_COLOR(1, 2, 0xf0),  NULL, 0, 0},
+       {2, 8, "d2",    RISC_COLOR(1, 2, 0xff),  NULL, 0, 0},
 
-       {13, 2, "h13",    RISC_COLOR(1, 13, 0x3),  NULL, 0, 0},
-       {13, 4, "s13",    RISC_COLOR(1, 13, 0xf),  NULL, 0, 0},
-       {13, 8, "d13",    RISC_COLOR(1, 13, 0xff), NULL, 0, 0},
+       {6, 4, "s6",    RISC_COLOR(1, 3, 0xf),   NULL, 0, 0},
+       {7, 4, "s7",    RISC_COLOR(1, 3, 0xf0),  NULL, 0, 0},
+       {3, 8, "d3",    RISC_COLOR(1, 3, 0xff),  NULL, 0, 0},
 
-       {14, 2, "h14",    RISC_COLOR(1, 14, 0x3),  NULL, 0, 0},
-       {14, 4, "s14",    RISC_COLOR(1, 14, 0xf),  NULL, 0, 0},
-       {14, 8, "d14",    RISC_COLOR(1, 14, 0xff), NULL, 0, 0},
+       {8, 4, "s8",    RISC_COLOR(1, 4, 0xf),   NULL, 0, 0},
+       {9, 4, "s9",    RISC_COLOR(1, 4, 0xf0),  NULL, 0, 0},
+       {4, 8, "d4",    RISC_COLOR(1, 4, 0xff),  NULL, 0, 0},
 
-       {15, 2, "h15",    RISC_COLOR(1, 15, 0x3),  NULL, 0, 0},
-       {15, 4, "s15",    RISC_COLOR(1, 15, 0xf),  NULL, 0, 0},
-       {15, 8, "d15",    RISC_COLOR(1, 15, 0xff), NULL, 0, 0},
+       {10, 4, "s10",  RISC_COLOR(1, 5, 0xf),   NULL, 0, 0},
+       {11, 4, "s11",  RISC_COLOR(1, 5, 0xf0),  NULL, 0, 0},
+       {5,  8, "d5",   RISC_COLOR(1, 5, 0xff),  NULL, 0, 0},
 
-       {16, 2, "h16",    RISC_COLOR(1, 16, 0x3),  NULL, 0, 0},
-       {16, 4, "s16",    RISC_COLOR(1, 16, 0xf),  NULL, 0, 0},
-       {16, 8, "d16",    RISC_COLOR(1, 16, 0xff), NULL, 0, 0},
+       {12, 4, "s12",  RISC_COLOR(1, 6, 0xf),   NULL, 0, 0},
+       {13, 4, "s13",  RISC_COLOR(1, 6, 0xf0),  NULL, 0, 0},
+       {6,  8, "d6",   RISC_COLOR(1, 6, 0xff),  NULL, 0, 0},
 
-       {17, 2, "h17",    RISC_COLOR(1, 17, 0x3),  NULL, 0, 0},
-       {17, 4, "s17",    RISC_COLOR(1, 17, 0xf),  NULL, 0, 0},
-       {17, 8, "d17",    RISC_COLOR(1, 17, 0xff), NULL, 0, 0},
+       {14, 4, "s14",  RISC_COLOR(1, 7, 0xf),   NULL, 0, 0},
+       {15, 4, "s15",  RISC_COLOR(1, 7, 0xf0),  NULL, 0, 0},
+       {7,  8, "d7",   RISC_COLOR(1, 7, 0xff),  NULL, 0, 0},
 
-       {18, 2, "h18",    RISC_COLOR(1, 18, 0x3),  NULL, 0, 0},
-       {18, 4, "s18",    RISC_COLOR(1, 18, 0xf),  NULL, 0, 0},
-       {18, 8, "d18",    RISC_COLOR(1, 18, 0xff), NULL, 0, 0},
+       {16, 4, "s16",  RISC_COLOR(1, 8, 0xf),   NULL, 0, 0},
+       {17, 4, "s17",  RISC_COLOR(1, 8, 0xf0),  NULL, 0, 0},
+       {8,  8, "d8",   RISC_COLOR(1, 8, 0xff),  NULL, 0, 0},
 
-       {19, 2, "h19",    RISC_COLOR(1, 19, 0x3),  NULL, 0, 0},
-       {19, 4, "s19",    RISC_COLOR(1, 19, 0xf),  NULL, 0, 0},
-       {19, 8, "d19",    RISC_COLOR(1, 19, 0xff), NULL, 0, 0},
+       {18, 4, "s18",  RISC_COLOR(1, 9, 0xf),   NULL, 0, 0},
+       {19, 4, "s19",  RISC_COLOR(1, 9, 0xf0),  NULL, 0, 0},
+       {9,  8, "d9",   RISC_COLOR(1, 9, 0xff),  NULL, 0, 0},
 
-       {20, 2, "h20",    RISC_COLOR(1, 20, 0x3),  NULL, 0, 0},
-       {20, 4, "s20",    RISC_COLOR(1, 20, 0xf),  NULL, 0, 0},
-       {20, 8, "d20",    RISC_COLOR(1, 20, 0xff), NULL, 0, 0},
+       {20, 4, "s20",  RISC_COLOR(1, 10, 0xf),  NULL, 0, 0},
+       {21, 4, "s21",  RISC_COLOR(1, 10, 0xf0), NULL, 0, 0},
+       {10, 8, "d10",  RISC_COLOR(1, 10, 0xff), NULL, 0, 0},
 
-       {21, 2, "h21",    RISC_COLOR(1, 21, 0x3),  NULL, 0, 0},
-       {21, 4, "s21",    RISC_COLOR(1, 21, 0xf),  NULL, 0, 0},
-       {21, 8, "d21",    RISC_COLOR(1, 21, 0xff), NULL, 0, 0},
+       {22, 4, "s22",  RISC_COLOR(1, 11, 0xf),  NULL, 0, 0},
+       {23, 4, "s23",  RISC_COLOR(1, 11, 0xf0), NULL, 0, 0},
+       {11, 8, "d11",  RISC_COLOR(1, 11, 0xff), NULL, 0, 0},
 
-       {22, 2, "h22",    RISC_COLOR(1, 22, 0x3),  NULL, 0, 0},
-       {22, 4, "s22",    RISC_COLOR(1, 22, 0xf),  NULL, 0, 0},
-       {22, 8, "d22",    RISC_COLOR(1, 22, 0xff), NULL, 0, 0},
+       {24, 4, "s24",  RISC_COLOR(1, 12, 0xf),  NULL, 0, 0},
+       {25, 4, "s25",  RISC_COLOR(1, 12, 0xf0), NULL, 0, 0},
+       {12, 8, "d12",  RISC_COLOR(1, 12, 0xff), NULL, 0, 0},
 
-       {23, 2, "h23",    RISC_COLOR(1, 23, 0x3),  NULL, 0, 0},
-       {23, 4, "s23",    RISC_COLOR(1, 23, 0xf),  NULL, 0, 0},
-       {23, 8, "d23",    RISC_COLOR(1, 23, 0xff), NULL, 0, 0},
+       {26, 4, "s26",  RISC_COLOR(1, 13, 0xf),  NULL, 0, 0},
+       {27, 4, "s27",  RISC_COLOR(1, 13, 0xf0), NULL, 0, 0},
+       {13, 8, "d13",  RISC_COLOR(1, 13, 0xff), NULL, 0, 0},
 
-       {24, 2, "h24",    RISC_COLOR(1, 24, 0x3),  NULL, 0, 0},
-       {24, 4, "s24",    RISC_COLOR(1, 24, 0xf),  NULL, 0, 0},
-       {24, 8, "d24",    RISC_COLOR(1, 24, 0xff), NULL, 0, 0},
+       {28, 4, "s28",  RISC_COLOR(1, 14, 0xf),  NULL, 0, 0},
+       {29, 4, "s29",  RISC_COLOR(1, 14, 0xf0), NULL, 0, 0},
+       {14, 8, "d14",  RISC_COLOR(1, 14, 0xff), NULL, 0, 0},
 
-       {25, 2, "h25",    RISC_COLOR(1, 25, 0x3),  NULL, 0, 0},
-       {25, 4, "s25",    RISC_COLOR(1, 25, 0xf),  NULL, 0, 0},
-       {25, 8, "d25",    RISC_COLOR(1, 25, 0xff), NULL, 0, 0},
-
-       {26, 2, "h26",    RISC_COLOR(1, 26, 0x3),  NULL, 0, 0},
-       {26, 4, "s26",    RISC_COLOR(1, 26, 0xf),  NULL, 0, 0},
-       {26, 8, "d26",    RISC_COLOR(1, 26, 0xff), NULL, 0, 0},
-
-       {27, 2, "h27",    RISC_COLOR(1, 27, 0x3),  NULL, 0, 0},
-       {27, 4, "s27",    RISC_COLOR(1, 27, 0xf),  NULL, 0, 0},
-       {27, 8, "d27",    RISC_COLOR(1, 27, 0xff), NULL, 0, 0},
-
-       {28, 2, "h28",    RISC_COLOR(1, 28, 0x3),  NULL, 0, 0},
-       {28, 4, "s28",    RISC_COLOR(1, 28, 0xf),  NULL, 0, 0},
-       {28, 8, "d28",    RISC_COLOR(1, 28, 0xff), NULL, 0, 0},
-
-       {29, 2, "h29",    RISC_COLOR(1, 29, 0x3),  NULL, 0, 0},
-       {29, 4, "s29",    RISC_COLOR(1, 29, 0xf),  NULL, 0, 0},
-       {29, 8, "d29",    RISC_COLOR(1, 29, 0xff), NULL, 0, 0},
-
-       {30, 2, "h30",    RISC_COLOR(1, 30, 0x3),  NULL, 0, 0},
-       {30, 4, "s30",    RISC_COLOR(1, 30, 0xf),  NULL, 0, 0},
-       {30, 8, "d30",    RISC_COLOR(1, 30, 0xff), NULL, 0, 0},
-
-       {31, 2, "h31",    RISC_COLOR(1, 31, 0x3),  NULL, 0, 0},
-       {31, 4, "s31",    RISC_COLOR(1, 31, 0xf),  NULL, 0, 0},
-       {31, 8, "d31",    RISC_COLOR(1, 31, 0xff), NULL, 0, 0},
-#endif
+       {30, 4, "s30",  RISC_COLOR(1, 15, 0xf),  NULL, 0, 0},
+       {31, 4, "s31",  RISC_COLOR(1, 15, 0xf0), NULL, 0, 0},
+       {15, 8, "d15",  RISC_COLOR(1, 15, 0xff), NULL, 0, 0},
 };
 
 static uint32_t arm32_abi_regs[] =
@@ -201,6 +141,27 @@ static uint32_t arm32_abi_regs[] =
 };
 
 static uint32_t arm32_abi_float_regs[] =
+{
+       SCF_RISC_REG_S0,
+       SCF_RISC_REG_S1,
+       SCF_RISC_REG_S2,
+       SCF_RISC_REG_S3,
+       SCF_RISC_REG_S4,
+       SCF_RISC_REG_S5,
+       SCF_RISC_REG_S6,
+       SCF_RISC_REG_S7,
+       SCF_RISC_REG_S8,
+       SCF_RISC_REG_S9,
+
+       SCF_RISC_REG_S10,
+       SCF_RISC_REG_S11,
+       SCF_RISC_REG_S12,
+       SCF_RISC_REG_S13,
+       SCF_RISC_REG_S14,
+       SCF_RISC_REG_S15,
+};
+
+static uint32_t arm32_abi_double_regs[] =
 {
        SCF_RISC_REG_D0,
        SCF_RISC_REG_D1,
@@ -242,6 +203,26 @@ static uint32_t arm32_abi_callee_saves[] =
        SCF_RISC_REG_X14,
 };
 
+static int arm32_color_conflict(intptr_t c0, intptr_t c1)
+{
+       intptr_t id0 = c0 >> 16;
+       intptr_t id1 = c1 >> 16;
+
+       if (c0 & c1 & 0xffff) {
+
+               if (id0 == id1)
+                       return 1;
+
+               if (id0 == id1 + 1 && 0xff == (c1 & 0xffff))
+                       return 1;
+
+               if (id0 == id1 - 1 && 0xff == (c0 & 0xffff))
+                       return 1;
+       }
+
+       return 0;
+}
+
 static int arm32_variable_size(scf_variable_t* v)
 {
        if (v->nb_dimentions > 0)
@@ -272,10 +253,6 @@ scf_register_t* arm32_find_register(const char* name)
 scf_register_t* arm32_find_register_type_id_bytes(uint32_t type, uint32_t id, int bytes)
 {
        int i;
-
-       if (bytes > 4 && 0 == type)
-               bytes = 4;
-
        for (i = 0; i < sizeof(arm32_registers) / sizeof(arm32_registers[0]); i++) {
 
                scf_register_t* r = &(arm32_registers[i]);
@@ -302,15 +279,11 @@ scf_register_t* arm32_find_register_color(intptr_t color)
 scf_register_t* arm32_find_register_color_bytes(intptr_t color, int bytes)
 {
        int i;
-
-       if (bytes > 4 && 0 == RISC_COLOR_TYPE(color))
-               bytes = 4;
-
        for (i = 0; i < sizeof(arm32_registers) / sizeof(arm32_registers[0]); i++) {
 
                scf_register_t* r = &(arm32_registers[i]);
 
-               if (RISC_COLOR_CONFLICT(r->color, color) && r->bytes == bytes)
+               if (arm32_color_conflict(r->color, color) && r->bytes == bytes)
                        return r;
        }
        return NULL;
@@ -367,7 +340,7 @@ int arm32_reg_cached_vars(scf_register_t* r)
                 || SCF_RISC_REG_X12 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm32_color_conflict(r->color, r2->color))
                        continue;
 
                nb_vars += r2->dag_nodes->size;
@@ -480,7 +453,7 @@ int arm32_caller_save_regs(scf_3ac_code_t* c, scf_function_t* f, uint32_t* regs,
                        if (0 == r->dag_nodes->size)
                                continue;
 
-                       if (RISC_COLOR_CONFLICT(r2->color, r->color))
+                       if (arm32_color_conflict(r2->color, r->color))
                                break;
                }
 
@@ -533,10 +506,10 @@ int arm32_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs,
        int i;
        int j;
 
-       scf_register_t* sp = arm32_find_register("sp");
-       scf_register_t* r;
-       scf_register_t* r2;
-       scf_instruction_t*    inst;
+       scf_register_t*     sp = arm32_find_register("sp");
+       scf_register_t*     r;
+       scf_register_t*     r2;
+       scf_instruction_t*  inst;
 
        for (j = nb_regs - 1; j >= 0; j--) {
                r2 = regs[j];
@@ -553,7 +526,7 @@ int arm32_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs,
                        if (0 == r->dag_nodes->size)
                                continue;
 
-                       if (RISC_COLOR_CONFLICT(r2->color, r->color))
+                       if (arm32_color_conflict(r2->color, r->color))
                                break;
                }
 
@@ -564,7 +537,7 @@ int arm32_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs,
 
                        r  = updated_regs[i];
 
-                       if (RISC_COLOR_CONFLICT(r2->color, r->color))
+                       if (arm32_color_conflict(r2->color, r->color))
                                break;
                }
 
@@ -572,7 +545,7 @@ int arm32_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs,
                        inst = f->iops->POP(c, r2);
                        RISC_INST_ADD_CHECK(c->instructions, inst);
                } else {
-                       inst = f->iops->ADD_IMM(c, sp, sp, 4);
+                       inst = f->iops->ADD_IMM(c, f, sp, sp, 4);
                        RISC_INST_ADD_CHECK(c->instructions, inst);
                }
        }
@@ -622,7 +595,6 @@ int arm32_registers_reset()
 int arm32_overflow_reg(scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f)
 {
        int i;
-
        for (i = 0; i < sizeof(arm32_registers) / sizeof(arm32_registers[0]); i++) {
 
                scf_register_t* r2 = &(arm32_registers[i]);
@@ -633,7 +605,7 @@ int arm32_overflow_reg(scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f)
                                || SCF_RISC_REG_X12 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm32_color_conflict(r->color, r2->color))
                        continue;
 
                int ret = risc_save_reg(r2, c, f);
@@ -665,7 +637,7 @@ int arm32_overflow_reg2(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c
                                || SCF_RISC_REG_X12 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm32_color_conflict(r->color, r2->color))
                        continue;
 
                for (j  = 0; j < r2->dag_nodes->size; ) {
@@ -677,8 +649,10 @@ int arm32_overflow_reg2(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c
                        }
 
                        int ret = risc_save_var(dn2, c, f);
-                       if (ret < 0)
+                       if (ret < 0) {
+                               scf_loge("\n");
                                return ret;
+                       }
                }
        }
 
@@ -706,7 +680,7 @@ int arm32_overflow_reg3(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c
                                || SCF_RISC_REG_X12 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm32_color_conflict(r->color, r2->color))
                        continue;
 
                for (j  = 0; j < r2->dag_nodes->size; ) {
@@ -768,7 +742,7 @@ int arm32_reg_used(scf_register_t* r, scf_dag_node_t* dn)
                                || SCF_RISC_REG_X12 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm32_color_conflict(r->color, r2->color))
                        continue;
 
                for (j  = 0; j < r2->dag_nodes->size; j++) {
@@ -793,6 +767,7 @@ scf_register_t* arm32_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
        int i;
        int j;
 
+       scf_3ac_code_print(c, NULL);
        assert(c->rcg);
 
        if (dn) {
@@ -828,18 +803,21 @@ scf_register_t* arm32_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
                                if (rn->dag_node->color <= 0)
                                        continue;
 
-                               if (RISC_COLOR_CONFLICT(r->color, rn->dag_node->color))
+                               if (arm32_color_conflict(r->color, rn->dag_node->color))
                                        break;
                        } else {
                                assert(rn->reg);
 
-                               if (RISC_COLOR_CONFLICT(r->color, rn->reg->color))
+                               if (arm32_color_conflict(r->color, rn->reg->color))
                                        break;
                        }
                }
 
-               if (j == neighbors->size)
+               if (j == neighbors->size) {
+                       scf_loge("i: %d, j: %d, r: %s\n", i, j, r->name);
+
                        free_regs[nb_free_regs++] = r;
+               }
        }
 
        if (nb_free_regs > 0)
@@ -865,7 +843,7 @@ scf_register_t* arm32_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
                                dst =        c->dsts->data[j];
 
                                if (dst->dag_node && dst->dag_node->color > 0 
-                                               && RISC_COLOR_CONFLICT(r->color, dst->dag_node->color))
+                                               && arm32_color_conflict(r->color, dst->dag_node->color))
                                        break;
                        }
 
@@ -880,7 +858,7 @@ scf_register_t* arm32_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
                                src =        c->srcs->data[j];
 
                                if (src->dag_node && src->dag_node->color > 0
-                                               && RISC_COLOR_CONFLICT(r->color, src->dag_node->color))
+                                               && arm32_color_conflict(r->color, src->dag_node->color))
                                        break;
                        }
 
@@ -894,17 +872,242 @@ scf_register_t* arm32_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
        return NULL;
 }
 
+static void arm32_argv_rabi(scf_function_t* f)
+{
+       scf_variable_t* v;
+
+       f->args_int    = 0;
+       f->args_float  = 0;
+       f->args_double = 0;
+
+       int bp_int    = -8;
+       int bp_floats = -8 - (int)f->rops->ABI_NB * 8;
+       int bp_others = 16;
+
+       int i;
+       for (i = 0; i < f->argv->size; i++) {
+               v  =        f->argv->data[i];
+
+               if (!v->arg_flag) {
+                       v ->arg_flag = 1;
+                       assert(f->inline_flag);
+               }
+
+               int is_float =      scf_variable_float(v);
+               int size     = f->rops->variable_size (v);
+               int rid;
+
+               if (is_float) {
+
+                       if (4 == size) {
+                               if (f->args_float  < f->rops->ABI_FLOAT_NB) {
+                                       rid            = f->rops->abi_float_regs[f->args_float++];
+                                       v->rabi        = f->rops->find_register_type_id_bytes(is_float, rid, 4);
+                                       v->bp_offset   = bp_floats;
+                                       bp_floats     -= 8;
+                                       f->args_double+= !(rid & 0x1);
+                                       continue;
+                               }
+
+                       } else {
+                               if (f->args_double < f->rops->ABI_DOUBLE_NB) {
+                                       rid            = f->rops->abi_double_regs[f->args_double++];
+                                       v->rabi        = f->rops->find_register_type_id_bytes(is_float, rid, 8);
+                                       v->bp_offset   = bp_floats;
+                                       bp_floats     -= 8;
+                                       f->args_float += 2;
+                                       continue;
+                               }
+                       }
+
+               } else if (size <= 4) { // int32 or int64
+
+                       if (f->args_int   < f->rops->ABI_NB) {
+                               rid           = f->rops->abi_regs[f->args_int++];
+                               v->rabi       = f->rops->find_register_type_id_bytes(is_float, rid, size);
+                               v->bp_offset  = bp_int;
+                               bp_int       -= 8;
+                               continue;
+                       }
+
+               } else {
+                       while (f->args_int < f->rops->ABI_NB) {
+                               rid            = f->rops->abi_regs[f->args_int];
+
+                               if (!(rid & 0x1))
+                                       break;
+
+                               f->args_int++;
+                       }
+
+                       if (f->args_int   < f->rops->ABI_NB) {
+                               v->rabi       = f->rops->find_register_type_id_bytes(is_float, rid, size);
+                               v->bp_offset  = bp_int;
+                               bp_int       -= 8;
+                               f->args_int  += 2;
+
+                               scf_loge("i: %d, is_float: %d, size: %d, rid: %d, %s\n", i, is_float, size, rid, v->rabi->name);
+                               continue;
+                       }
+               }
+
+               v->rabi       = NULL;
+               v->bp_offset  = bp_others;
+               bp_others    += 8;
+       }
+}
+
+void arm32_call_rabi(scf_3ac_code_t* c, scf_function_t* f, int* p_nints, int* p_nfloats, int* p_ndoubles)
+{
+       scf_3ac_operand_t* src = NULL;
+       scf_dag_node_t*    dn  = NULL;
+
+       int ndoubles = 0;
+       int nfloats  = 0;
+       int nints    = 0;
+       int i;
+
+       for (i  = 1; i < c->srcs->size; i++) {
+               src =        c->srcs->data[i];
+               dn  =        src->dag_node;
+
+               int is_float =      scf_variable_float(dn->var);
+               int size     = f->rops->variable_size (dn->var);
+               int rid;
+
+               if (is_float) {
+
+                       if (4 == size) {
+                               if (nfloats   < f->rops->ABI_FLOAT_NB) {
+                                       rid       = f->rops->abi_float_regs[nfloats++];
+                                       dn->rabi2 = f->rops->find_register_type_id_bytes(is_float, rid, size);
+                                       ndoubles += !(rid & 0x1);
+                               } else
+                                       dn->rabi2 = NULL;
+
+                       } else {
+                               if (ndoubles  < f->rops->ABI_DOUBLE_NB) {
+                                       rid       = f->rops->abi_double_regs[ndoubles++];
+                                       dn->rabi2 = f->rops->find_register_type_id_bytes(is_float, rid, size);
+                                       nfloats  += 2;
+                               } else
+                                       dn->rabi2 = NULL;
+                       }
+
+               } else if (size <= 4) {
+
+                       if (nints     < f->rops->ABI_NB)
+                               dn->rabi2 = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_regs[nints++], size);
+                       else
+                               dn->rabi2 = NULL;
+
+               } else {
+                       while (nints < f->rops->ABI_NB) {
+                               rid      = f->rops->abi_regs[nints];
+
+                               if (!(rid & 0x1))
+                                       break;
+
+                               nints++;
+                       }
+
+                       if (nints     < f->rops->ABI_NB) {
+                               dn->rabi2 = f->rops->find_register_type_id_bytes(is_float, rid, size);
+                               nints    += 2;
+                       }
+               }
+
+               src->rabi = dn->rabi2;
+       }
+
+       if (p_nints)
+               *p_nints = nints;
+
+       if (p_nfloats)
+               *p_nfloats = nfloats;
+
+       if (p_ndoubles)
+               *p_ndoubles = ndoubles;
+}
+
+int arm32_push_callee_regs(scf_3ac_code_t* c, scf_function_t* f)
+{
+       scf_instruction_t* inst;
+       scf_register_t*    r2;
+       scf_register_t*    r;
+
+       int N = sizeof(arm32_registers) / sizeof(arm32_registers[0]);
+       int i;
+       int j;
+
+       for (i = 0; i < f->rops->ABI_CALLEE_SAVES_NB; i++) {
+
+               j  =        f->rops->abi_callee_saves[i];
+               r  =        f->rops->find_register_type_id_bytes(0, j, 4);
+
+               for (j = 0; j < N; j++) {
+                       r2 = &(arm32_registers[j]);
+
+                       if (r2->used && f->rops->color_conflict(r2->color, r->color))
+                               break;
+               }
+
+               if (j < N) {
+                       inst = f->iops->PUSH(NULL, r);
+                       RISC_INST_ADD_CHECK(f->init_code->instructions, inst);
+
+                       f->init_code_bytes += inst->len;
+               }
+       }
+
+       return 0;
+}
+
+int arm32_pop_callee_regs(scf_3ac_code_t* c, scf_function_t* f)
+{
+       scf_instruction_t* inst;
+       scf_register_t*    r2;
+       scf_register_t*    r;
+
+       int N = sizeof(arm32_registers) / sizeof(arm32_registers[0]);
+       int i;
+       int j;
+
+       for (i = f->rops->ABI_CALLEE_SAVES_NB - 1; i >= 0; i--) {
+
+               j  = f->rops->abi_callee_saves[i];
+               r  = f->rops->find_register_type_id_bytes(0, j, 4);
+
+               for (j = 0; j < N; j++) {
+                       r2 = &(arm32_registers[j]);
+
+                       if (r2->used && f->rops->color_conflict(r2->color, r->color))
+                               break;
+               }
+
+               if (j < N) {
+                       inst = f->iops->POP(c, r);
+                       RISC_INST_ADD_CHECK(c->instructions, inst);
+               }
+       }
+
+       return 0;
+}
+
 scf_regs_ops_t  regs_ops_arm32 =
 {
        .name                        = "arm32",
 
        .abi_regs                    = arm32_abi_regs,
        .abi_float_regs              = arm32_abi_float_regs,
+       .abi_double_regs             = arm32_abi_double_regs,
        .abi_ret_regs                = arm32_abi_ret_regs,
        .abi_caller_saves            = arm32_abi_caller_saves,
        .abi_callee_saves            = arm32_abi_callee_saves,
 
        .ABI_NB                      = sizeof(arm32_abi_regs)         / sizeof(uint32_t),
+       .ABI_FLOAT_NB                = sizeof(arm32_abi_float_regs)   / sizeof(uint32_t),
+       .ABI_DOUBLE_NB               = sizeof(arm32_abi_double_regs)  / sizeof(uint32_t),
        .ABI_RET_NB                  = sizeof(arm32_abi_ret_regs)     / sizeof(uint32_t),
        .ABI_CALLER_SAVES_NB         = sizeof(arm32_abi_caller_saves) / sizeof(uint32_t),
        .ABI_CALLEE_SAVES_NB         = sizeof(arm32_abi_callee_saves) / sizeof(uint32_t),
@@ -916,6 +1119,11 @@ scf_regs_ops_t  regs_ops_arm32 =
        .registers_clear             = arm32_registers_clear,
        .register_colors             = arm32_register_colors,
 
+       .color_conflict              = arm32_color_conflict,
+
+       .argv_rabi                   = arm32_argv_rabi,
+       .call_rabi                   = arm32_call_rabi,
+
        .reg_used                    = arm32_reg_used,
        .reg_cached_vars             = arm32_reg_cached_vars,
 
@@ -933,5 +1141,8 @@ scf_regs_ops_t  regs_ops_arm32 =
        .overflow_reg                = arm32_overflow_reg,
        .overflow_reg2               = arm32_overflow_reg2,
        .overflow_reg3               = arm32_overflow_reg3,
+
+       .push_callee_regs            = arm32_push_callee_regs,
+       .pop_callee_regs             = arm32_pop_callee_regs,
 };
 
index 8a7b32184e2722a33e49ec6af4210b0a4df7c7e5..39526097ef07754a87b837547edda72409429254 100644 (file)
@@ -303,6 +303,14 @@ static uint32_t arm64_abi_callee_saves[] =
        SCF_RISC_REG_X30,
 };
 
+static int arm64_color_conflict(intptr_t c0, intptr_t c1)
+{
+       intptr_t id0 = c0 >> 16;
+       intptr_t id1 = c1 >> 16;
+
+       return id0 == id1 && (c0 & c1 & 0xffff);
+}
+
 static int arm64_variable_size(scf_variable_t* v)
 {
        if (v->nb_dimentions > 0)
@@ -360,7 +368,7 @@ scf_register_t* arm64_find_register_color_bytes(intptr_t color, int bytes)
 
                scf_register_t* r = &(arm64_registers[i]);
 
-               if (RISC_COLOR_CONFLICT(r->color, color) && r->bytes == bytes)
+               if (arm64_color_conflict(r->color, color) && r->bytes == bytes)
                        return r;
        }
        return NULL;
@@ -419,7 +427,7 @@ int arm64_reg_cached_vars(scf_register_t* r)
                 || SCF_RISC_REG_X17 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm64_color_conflict(r->color, r2->color))
                        continue;
 
                nb_vars += r2->dag_nodes->size;
@@ -535,7 +543,7 @@ int arm64_caller_save_regs(scf_3ac_code_t* c, scf_function_t* f, uint32_t* regs,
                        if (0 == r->dag_nodes->size)
                                continue;
 
-                       if (RISC_COLOR_CONFLICT(r2->color, r->color))
+                       if (arm64_color_conflict(r2->color, r->color))
                                break;
                }
 
@@ -608,7 +616,7 @@ int arm64_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs,
                        if (0 == r->dag_nodes->size)
                                continue;
 
-                       if (RISC_COLOR_CONFLICT(r2->color, r->color))
+                       if (arm64_color_conflict(r2->color, r->color))
                                break;
                }
 
@@ -619,7 +627,7 @@ int arm64_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs,
 
                        r  = updated_regs[i];
 
-                       if (RISC_COLOR_CONFLICT(r2->color, r->color))
+                       if (arm64_color_conflict(r2->color, r->color))
                                break;
                }
 
@@ -627,7 +635,7 @@ int arm64_pop_regs(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** regs,
                        inst = f->iops->POP(c, r2);
                        RISC_INST_ADD_CHECK(c->instructions, inst);
                } else {
-                       inst = f->iops->ADD_IMM(c, sp, sp, 8);
+                       inst = f->iops->ADD_IMM(c, f, sp, sp, 8);
                        RISC_INST_ADD_CHECK(c->instructions, inst);
                }
        }
@@ -690,7 +698,7 @@ int arm64_overflow_reg(scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f)
                                || SCF_RISC_REG_X17 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm64_color_conflict(r->color, r2->color))
                        continue;
 
                int ret = risc_save_reg(r2, c, f);
@@ -723,7 +731,7 @@ int arm64_overflow_reg2(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c
                                || SCF_RISC_REG_X17 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm64_color_conflict(r->color, r2->color))
                        continue;
 
                for (j  = 0; j < r2->dag_nodes->size; ) {
@@ -765,7 +773,7 @@ int arm64_overflow_reg3(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c
                                || SCF_RISC_REG_X17 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm64_color_conflict(r->color, r2->color))
                        continue;
 
                for (j  = 0; j < r2->dag_nodes->size; ) {
@@ -828,7 +836,7 @@ int arm64_reg_used(scf_register_t* r, scf_dag_node_t* dn)
                                || SCF_RISC_REG_X17 == r2->id)
                        continue;
 
-               if (!RISC_COLOR_CONFLICT(r->color, r2->color))
+               if (!arm64_color_conflict(r->color, r2->color))
                        continue;
 
                for (j  = 0; j < r2->dag_nodes->size; j++) {
@@ -890,12 +898,12 @@ scf_register_t* arm64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
                                if (rn->dag_node->color <= 0)
                                        continue;
 
-                               if (RISC_COLOR_CONFLICT(r->color, rn->dag_node->color))
+                               if (arm64_color_conflict(r->color, rn->dag_node->color))
                                        break;
                        } else {
                                assert(rn->reg);
 
-                               if (RISC_COLOR_CONFLICT(r->color, rn->reg->color))
+                               if (arm64_color_conflict(r->color, rn->reg->color))
                                        break;
                        }
                }
@@ -928,7 +936,7 @@ scf_register_t* arm64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
                                dst =        c->dsts->data[j];
 
                                if (dst->dag_node && dst->dag_node->color > 0 
-                                               && RISC_COLOR_CONFLICT(r->color, dst->dag_node->color))
+                                               && arm64_color_conflict(r->color, dst->dag_node->color))
                                        break;
                        }
 
@@ -943,7 +951,7 @@ scf_register_t* arm64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
                                src =        c->srcs->data[j];
 
                                if (src->dag_node && src->dag_node->color > 0
-                                               && RISC_COLOR_CONFLICT(r->color, src->dag_node->color))
+                                               && arm64_color_conflict(r->color, src->dag_node->color))
                                        break;
                        }
 
@@ -957,6 +965,142 @@ scf_register_t* arm64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t*
        return NULL;
 }
 
+static void arm64_argv_rabi(scf_function_t* f)
+{
+       scf_variable_t* v;
+
+       f->args_int   = 0;
+       f->args_float = 0;
+
+       int bp_int    = -8;
+       int bp_floats = -8 - (int)f->rops->ABI_NB * 8;
+       int bp_others = 16;
+
+       int i;
+       for (i = 0; i < f->argv->size; i++) {
+               v  =        f->argv->data[i];
+
+               if (!v->arg_flag) {
+                       v ->arg_flag = 1;
+                       assert(f->inline_flag);
+               }
+
+               int is_float =      scf_variable_float(v);
+               int size     = f->rops->variable_size (v);
+
+               if (is_float) {
+
+                       if (f->args_float < f->rops->ABI_NB) {
+
+                               v->rabi       = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_float_regs[f->args_float], size);
+                               v->bp_offset  = bp_floats;
+                               bp_floats    -= 8;
+                               f->args_float++;
+                               continue;
+                       }
+               } else if (f->args_int < f->rops->ABI_NB) {
+
+                       v->rabi       = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_regs[f->args_int], size);
+                       v->bp_offset  = bp_int;
+                       bp_int       -= 8;
+                       f->args_int++;
+                       continue;
+               }
+
+               v->rabi       = NULL;
+               v->bp_offset  = bp_others;
+               bp_others    += 8;
+       }
+}
+
+void arm64_call_rabi(scf_3ac_code_t* c, scf_function_t* f, int* p_nints, int* p_nfloats, int* p_ndoubles)
+{
+       scf_3ac_operand_t* src = NULL;
+       scf_dag_node_t*    dn  = NULL;
+
+       int nfloats = 0;
+       int nints   = 0;
+       int i;
+
+       for (i  = 1; i < c->srcs->size; i++) {
+               src =        c->srcs->data[i];
+               dn  =        src->dag_node;
+
+               int is_float =      scf_variable_float(dn->var);
+               int size     = f->rops->variable_size (dn->var);
+
+               if (is_float) {
+                       if (nfloats   < f->rops->ABI_NB)
+                               dn->rabi2 = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_float_regs[nfloats++], size);
+                       else
+                               dn->rabi2 = NULL;
+               } else {
+                       if (nints     < f->rops->ABI_NB)
+                               dn->rabi2 = f->rops->find_register_type_id_bytes(is_float, f->rops->abi_regs[nints++], size);
+                       else
+                               dn->rabi2 = NULL;
+               }
+
+               src->rabi = dn->rabi2;
+       }
+
+       if (p_nints)
+               *p_nints = nints;
+
+       if (p_nfloats)
+               *p_nfloats = nfloats;
+}
+
+int arm64_push_callee_regs(scf_3ac_code_t* c, scf_function_t* f)
+{
+       scf_instruction_t* inst;
+       scf_register_t*    r;
+
+       int i;
+       for (i = 0; i < f->rops->ABI_CALLEE_SAVES_NB; i++) {
+
+               r  = f->rops->find_register_type_id_bytes(0, f->rops->abi_callee_saves[i], 8);
+
+               if (!r->used) {
+                       r  = f->rops->find_register_type_id_bytes(0, f->rops->abi_callee_saves[i], 4);
+
+                       if (!r->used)
+                               continue;
+               }
+
+               inst   = f->iops->PUSH(NULL, r);
+               RISC_INST_ADD_CHECK(f->init_code->instructions, inst);
+
+               f->init_code_bytes += inst->len;
+       }
+
+       return 0;
+}
+
+int arm64_pop_callee_regs(scf_3ac_code_t* c, scf_function_t* f)
+{
+       scf_instruction_t* inst;
+       scf_register_t*    r;
+
+       int i;
+       for (i = f->rops->ABI_CALLEE_SAVES_NB - 1; i >= 0; i--) {
+
+               r  = f->rops->find_register_type_id_bytes(0, f->rops->abi_callee_saves[i], 8);
+
+               if (!r->used) {
+                       r  = f->rops->find_register_type_id_bytes(0, f->rops->abi_callee_saves[i], 4);
+
+                       if (!r->used)
+                               continue;
+               }
+
+               inst = f->iops->POP(c, r);
+               RISC_INST_ADD_CHECK(c->instructions, inst);
+       }
+
+       return 0;
+}
+
 #define RISC_ABI_NB              (sizeof(arm64_abi_regs)        / sizeof(arm64_abi_regs[0]))
 #define RISC_ABI_RET_NB          (sizeof(risc_abi_ret_regs)     / sizeof(risc_abi_ret_regs[0]))
 #define RISC_ABI_CALLER_SAVES_NB (sizeof(risc_abi_caller_saves) / sizeof(risc_abi_caller_saves[0]))
@@ -984,6 +1128,11 @@ scf_regs_ops_t  regs_ops_arm64 =
        .registers_clear             = arm64_registers_clear,
        .register_colors             = arm64_register_colors,
 
+       .color_conflict              = arm64_color_conflict,
+
+       .argv_rabi                   = arm64_argv_rabi,
+       .call_rabi                   = arm64_call_rabi,
+
        .reg_used                    = arm64_reg_used,
        .reg_cached_vars             = arm64_reg_cached_vars,
 
@@ -1001,6 +1150,9 @@ scf_regs_ops_t  regs_ops_arm64 =
        .overflow_reg                = arm64_overflow_reg,
        .overflow_reg2               = arm64_overflow_reg2,
        .overflow_reg3               = arm64_overflow_reg3,
+
+       .push_callee_regs            = arm64_push_callee_regs,
+       .pop_callee_regs             = arm64_pop_callee_regs,
 };
 
 scf_regs_ops_t  regs_ops_naja =
@@ -1025,6 +1177,11 @@ scf_regs_ops_t  regs_ops_naja =
        .registers_clear             = arm64_registers_clear,
        .register_colors             = arm64_register_colors,
 
+       .color_conflict              = arm64_color_conflict,
+
+       .argv_rabi                   = arm64_argv_rabi,
+       .call_rabi                   = arm64_call_rabi,
+
        .reg_used                    = arm64_reg_used,
        .reg_cached_vars             = arm64_reg_cached_vars,
 
@@ -1042,5 +1199,8 @@ scf_regs_ops_t  regs_ops_naja =
        .overflow_reg                = arm64_overflow_reg,
        .overflow_reg2               = arm64_overflow_reg2,
        .overflow_reg3               = arm64_overflow_reg3,
+
+       .push_callee_regs            = arm64_push_callee_regs,
+       .pop_callee_regs             = arm64_pop_callee_regs,
 };
 
index 5e943f26dc01beea58d844f0ed017cb4e637a1ea..c64aa7ad3ca7b6dfe3608ef5f78436b16a68c6ad 100644 (file)
@@ -158,6 +158,16 @@ enum scf_risc_REGs {
        SCF_RISC_REG_S7 = 7,
        SCF_RISC_REG_D7 = 7,
 
+       SCF_RISC_REG_S8  = 8,
+       SCF_RISC_REG_S9  = 9,
+       SCF_RISC_REG_S10 = 10,
+       SCF_RISC_REG_S11 = 11,
+       SCF_RISC_REG_S12 = 12,
+       SCF_RISC_REG_S13 = 13,
+       SCF_RISC_REG_S14 = 14,
+       SCF_RISC_REG_S15 = 15,
+
+
        SCF_RISC_REG_W8 = 8,
        SCF_RISC_REG_X8 = 8,
 
index e3cf74fb438d8f0edb0df39375719bda6bce6fa9..a8b05bca1ab38e2bf0cc13f8ee0f1ec5d4e2934e 100644 (file)
@@ -101,11 +101,14 @@ struct scf_regs_ops_s
 
        uint32_t*           abi_regs;
        uint32_t*           abi_float_regs;
+       uint32_t*           abi_double_regs;
        uint32_t*           abi_ret_regs;
        uint32_t*           abi_caller_saves;
        uint32_t*           abi_callee_saves;
 
        const int           ABI_NB;
+       const int           ABI_FLOAT_NB;
+       const int           ABI_DOUBLE_NB;
        const int           ABI_RET_NB;
        const int           ABI_CALLER_SAVES_NB;
        const int           ABI_CALLEE_SAVES_NB;
@@ -117,6 +120,11 @@ struct scf_regs_ops_s
        void              (*registers_clear )();
        scf_vector_t*     (*register_colors )();
 
+       int               (*color_conflict  )(intptr_t color0, intptr_t color1);
+
+       void              (*argv_rabi       )(scf_function_t* f);
+       void              (*call_rabi       )(scf_3ac_code_t* c, scf_function_t* f, int* p_nints, int* p_nfloats, int* p_ndoubles);
+
        int               (*reg_used        )(scf_register_t* r, scf_dag_node_t* dn);
        int               (*reg_cached_vars )(scf_register_t* r);
 
@@ -135,6 +143,9 @@ struct scf_regs_ops_s
        int               (*overflow_reg )(scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f);
        int               (*overflow_reg2)(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f);
        int               (*overflow_reg3)(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f);
+
+       int               (*push_callee_regs)(scf_3ac_code_t* c, scf_function_t* f);
+       int               (*pop_callee_regs )(scf_3ac_code_t* c, scf_function_t* f);
 };
 
 struct scf_inst_ops_s
@@ -146,45 +157,46 @@ struct scf_inst_ops_s
        scf_instruction_t* (*PUSH    )(scf_3ac_code_t* c, scf_register_t* r);
        scf_instruction_t* (*POP     )(scf_3ac_code_t* c, scf_register_t* r);
        scf_instruction_t* (*TEQ     )(scf_3ac_code_t* c, scf_register_t* rs);
-       scf_instruction_t* (*NEG     )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-
-       scf_instruction_t* (*MOVZX   )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, int size);
-       scf_instruction_t* (*MOVSX   )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, int size);
-       scf_instruction_t* (*MVN     )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-       scf_instruction_t* (*MOV_G   )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-       scf_instruction_t* (*MOV_SP  )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-
-       scf_instruction_t* (*ADD_G   )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*ADD_IMM )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, uint64_t imm);
-       scf_instruction_t* (*SUB_G   )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*SUB_IMM )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs, uint64_t imm);
+       scf_instruction_t* (*NEG     )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+
+       scf_instruction_t* (*MOVZX   )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs, int size);
+       scf_instruction_t* (*MOVSX   )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs, int size);
+       scf_instruction_t* (*MVN     )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+       scf_instruction_t* (*MOV_G   )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+       scf_instruction_t* (*MOV_SP  )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+
+       scf_instruction_t* (*ADD_G   )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*SUB_G   )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
        scf_instruction_t* (*CMP_G   )(scf_3ac_code_t* c, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*CMP_IMM )(scf_3ac_code_t* c, scf_register_t* rs, uint64_t imm);
-       scf_instruction_t* (*AND_G   )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*OR_G    )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-
-       scf_instruction_t* (*MUL     )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*DIV     )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*SDIV    )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*MSUB    )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rm, scf_register_t* rn, scf_register_t* ra);
-
-       scf_instruction_t* (*SHL     )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*SHR     )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*ASR     )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-
-       scf_instruction_t* (*CVTSS2SD)(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-       scf_instruction_t* (*CVTSD2SS)(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-       scf_instruction_t* (*CVTF2SI )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-       scf_instruction_t* (*CVTF2UI )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-       scf_instruction_t* (*CVTSI2F )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
-       scf_instruction_t* (*CVTUI2F )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
+       scf_instruction_t* (*AND_G   )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*OR_G    )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+
+       scf_instruction_t* (*ADD_IMM )(scf_3ac_code_t* c, scf_function_t* f,   scf_register_t* rd, scf_register_t* rs, uint64_t imm);
+       scf_instruction_t* (*SUB_IMM )(scf_3ac_code_t* c, scf_function_t* f,   scf_register_t* rd, scf_register_t* rs, uint64_t imm);
+       scf_instruction_t* (*CMP_IMM )(scf_3ac_code_t* c, scf_function_t* f,   scf_register_t* rs, uint64_t imm);
+
+       scf_instruction_t* (*MUL     )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*DIV     )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*SDIV    )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*MSUB    )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rm, scf_register_t* rn, scf_register_t* ra);
+
+       scf_instruction_t* (*SHL     )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*SHR     )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*ASR     )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+
+       scf_instruction_t* (*CVTSS2SD)(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+       scf_instruction_t* (*CVTSD2SS)(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+       scf_instruction_t* (*CVTF2SI )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+       scf_instruction_t* (*CVTF2UI )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+       scf_instruction_t* (*CVTSI2F )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
+       scf_instruction_t* (*CVTUI2F )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
 
        scf_instruction_t* (*FCMP    )(scf_3ac_code_t* c, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*FADD    )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*FSUB    )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*FMUL    )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*FDIV    )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs0, scf_register_t* rs1);
-       scf_instruction_t* (*FMOV_G  )(scf_3ac_code_t* c, scf_register_t* rd, scf_register_t* rs);
+       scf_instruction_t* (*FADD    )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*FSUB    )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*FMUL    )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*FDIV    )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs0, scf_register_t* rs1);
+       scf_instruction_t* (*FMOV_G  )(scf_3ac_code_t* c, scf_register_t* rd,  scf_register_t* rs);
 
        scf_instruction_t* (*JA      )(scf_3ac_code_t* c);
        scf_instruction_t* (*JB      )(scf_3ac_code_t* c);
index 85fcbde3b5fde3df9c240b9bcdc2a73896c94f02..38a83a2171ea0abe056575ac72564bb42c328149 100644 (file)
@@ -121,21 +121,21 @@ static int _x64_function_init(scf_function_t* f, scf_vector_t* local_vars)
 
 static int _x64_save_rabi(scf_function_t* f)
 {
-       scf_register_x64_t* rbp;
+       scf_register_t* rbp;
        scf_instruction_t*  inst;
        scf_x64_OpCode_t*   mov;
 
-       scf_register_x64_t* rdi;
-       scf_register_x64_t* rsi;
-       scf_register_x64_t* rdx;
-       scf_register_x64_t* rcx;
-       scf_register_x64_t* r8;
-       scf_register_x64_t* r9;
+       scf_register_t* rdi;
+       scf_register_t* rsi;
+       scf_register_t* rdx;
+       scf_register_t* rcx;
+       scf_register_t* r8;
+       scf_register_t* r9;
 
-       scf_register_x64_t* xmm0;
-       scf_register_x64_t* xmm1;
-       scf_register_x64_t* xmm2;
-       scf_register_x64_t* xmm3;
+       scf_register_t* xmm0;
+       scf_register_t* xmm1;
+       scf_register_t* xmm2;
+       scf_register_t* xmm3;
 
        if (f->vargs_flag) {
 
@@ -154,7 +154,7 @@ static int _x64_save_rabi(scf_function_t* f)
 #define X64_SAVE_RABI(offset, rabi) \
                do { \
                        inst = x64_make_inst_G2P(mov, rbp, offset, rabi); \
-                       X64_INST_ADD_CHECK(f->init_insts, inst); \
+                       X64_INST_ADD_CHECK(f->init_code->instructions, inst); \
                        f->init_code_bytes += inst->len; \
                } while (0)
 
@@ -183,31 +183,37 @@ static int _x64_save_rabi(scf_function_t* f)
 
 static int _x64_function_finish(scf_function_t* f)
 {
-       if (!f->init_insts) {
-               f->init_insts = scf_vector_alloc();
-               if (!f->init_insts)
-                       return -ENOMEM;
-       } else
-               scf_vector_clear(f->init_insts, free);
+       assert(!f->init_code);
+
+       f->init_code = scf_3ac_code_alloc();
+       if (!f->init_code)
+               return -ENOMEM;
+
+       f->init_code->instructions = scf_vector_alloc();
+
+       if (!f->init_code->instructions) {
+               scf_3ac_code_free(f->init_code);
+               return -ENOMEM;
+       }
 
        scf_x64_OpCode_t*   push = x64_find_OpCode(SCF_X64_PUSH, 8,8, SCF_X64_G);
        scf_x64_OpCode_t*   pop  = x64_find_OpCode(SCF_X64_POP,  8,8, SCF_X64_G);
        scf_x64_OpCode_t*   mov  = x64_find_OpCode(SCF_X64_MOV,  4,4, SCF_X64_G2E);
        scf_x64_OpCode_t*   sub  = x64_find_OpCode(SCF_X64_SUB,  4,8, SCF_X64_I2E);
 
-       scf_register_x64_t* rsp  = x64_find_register("rsp");
-       scf_register_x64_t* rbp  = x64_find_register("rbp");
-       scf_register_x64_t* r;
+       scf_register_t* rsp  = x64_find_register("rsp");
+       scf_register_t* rbp  = x64_find_register("rbp");
+       scf_register_t* r;
        scf_instruction_t*  inst = NULL;
 
        if (f->bp_used_flag) {
 
                inst = x64_make_inst_G(push, rbp);
-               X64_INST_ADD_CHECK(f->init_insts, inst);
+               X64_INST_ADD_CHECK(f->init_code->instructions, inst);
                f->init_code_bytes  = inst->len;
 
                inst = x64_make_inst_G2E(mov, rbp, rsp);
-               X64_INST_ADD_CHECK(f->init_insts, inst);
+               X64_INST_ADD_CHECK(f->init_code->instructions, inst);
                f->init_code_bytes += inst->len;
 
                uint32_t local = f->local_vars_size;
@@ -216,7 +222,7 @@ static int _x64_function_finish(scf_function_t* f)
 
                inst = x64_make_inst_I2E(sub, rsp, (uint8_t*)&local, 4);
                //inst = x64_make_inst_I2E(sub, rsp, (uint8_t*)&f->local_vars_size, 4);
-               X64_INST_ADD_CHECK(f->init_insts, inst);
+               X64_INST_ADD_CHECK(f->init_code->instructions, inst);
                f->init_code_bytes += inst->len;
 
                int ret = _x64_save_rabi(f);
@@ -231,7 +237,7 @@ static int _x64_function_finish(scf_function_t* f)
                r  = x64_find_register_type_id_bytes(0, x64_abi_callee_saves[i], 8);
 
                inst = x64_make_inst_G(push, r);
-               X64_INST_ADD_CHECK(f->init_insts, inst);
+               X64_INST_ADD_CHECK(f->init_code->instructions, inst);
 
                f->init_code_bytes += inst->len;
        }
@@ -271,7 +277,7 @@ static void _x64_rcg_node_printf(x64_rcg_node_t* rn)
                }
 
                if (rn->dag_node->color > 0) {
-                       scf_register_x64_t* r = x64_find_register_color(rn->dag_node->color);
+                       scf_register_t* r = x64_find_register_color(rn->dag_node->color);
                        printf(", reg: %s\n", r->name);
                } else {
                        printf("\n");
@@ -376,7 +382,7 @@ static int _x64_argv_save(scf_basic_block_t* bb, scf_function_t* f)
                scf_dag_node_t*     dn;
                scf_dag_node_t*     dn2;
                scf_dn_status_t*   active;
-               scf_register_x64_t* rabi;
+               scf_register_t* rabi;
 
                for (l = scf_list_head(&f->dag_list_head); l != scf_list_sentinel(&f->dag_list_head);
                                l = scf_list_next(l)) {
index da18199f109480a4bfb721e69b229690e18e6a6c..6d515bf2bdb22fd615d5edb9b12da727767beece 100644 (file)
@@ -52,7 +52,7 @@ typedef struct {
 typedef struct {
        scf_dag_node_t*      dag_node;
 
-       scf_register_x64_t*  reg;
+       scf_register_t*  reg;
 
        scf_x64_OpCode_t*    OpCode;
 
@@ -71,8 +71,8 @@ typedef struct {
 x64_rcg_handler_t*  scf_x64_find_rcg_handler(const int op_type);
 x64_inst_handler_t* scf_x64_find_inst_handler(const int op_type);
 
-int x64_rcg_find_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn, scf_register_x64_t* reg);
-int _x64_rcg_make_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn, scf_register_x64_t* reg, scf_x64_OpCode_t* OpCode);
+int x64_rcg_find_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn, scf_register_t* reg);
+int _x64_rcg_make_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn, scf_register_t* reg, scf_x64_OpCode_t* OpCode);
 
 int scf_x64_open  (scf_native_t* ctx, const char* arch);
 int scf_x64_close (scf_native_t* ctx);
@@ -97,33 +97,33 @@ int  x64_load_bb_colors2(scf_basic_block_t* bb, scf_bb_group_t* bbg, scf_functio
 void x64_init_bb_colors (scf_basic_block_t* bb);
 
 
-scf_instruction_t* x64_make_inst(scf_x64_OpCode_t* OpCode, int size);
-scf_instruction_t* x64_make_inst_G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r);
-scf_instruction_t* x64_make_inst_E(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r);
+scf_instruction_t* x64_make_inst  (scf_x64_OpCode_t* OpCode, int size);
+scf_instruction_t* x64_make_inst_G(scf_x64_OpCode_t* OpCode, scf_register_t* r);
+scf_instruction_t* x64_make_inst_E(scf_x64_OpCode_t* OpCode, scf_register_t* r);
 scf_instruction_t* x64_make_inst_I(scf_x64_OpCode_t* OpCode, uint8_t* imm, int size);
 void               x64_make_inst_I2(scf_instruction_t* inst, scf_x64_OpCode_t* OpCode, uint8_t* imm, int size);
 
-scf_instruction_t* x64_make_inst_I2G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, uint8_t* imm, int size);
-scf_instruction_t* x64_make_inst_I2E(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, uint8_t* imm, int size);
+scf_instruction_t* x64_make_inst_I2G(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, uint8_t* imm, int size);
+scf_instruction_t* x64_make_inst_I2E(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, uint8_t* imm, int size);
 
-scf_instruction_t* x64_make_inst_M ( scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v,         scf_register_x64_t* r_base);
-scf_instruction_t* x64_make_inst_I2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v_dst,     scf_register_x64_t* r_base, uint8_t* imm, int32_t size);
-scf_instruction_t* x64_make_inst_G2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v_dst,     scf_register_x64_t* r_base, scf_register_x64_t* r_src);
-scf_instruction_t* x64_make_inst_M2G(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, scf_register_x64_t* r_base, scf_variable_t* v_src);
+scf_instruction_t* x64_make_inst_M  (scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v,     scf_register_t* r_base);
+scf_instruction_t* x64_make_inst_I2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v_dst, scf_register_t* r_base, uint8_t* imm, int32_t size);
+scf_instruction_t* x64_make_inst_G2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v_dst, scf_register_t* r_base, scf_register_t* r_src);
+scf_instruction_t* x64_make_inst_M2G(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, scf_register_t* r_base, scf_variable_t* v_src);
 
-scf_instruction_t* x64_make_inst_G2E(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, scf_register_x64_t* r_src);
-scf_instruction_t* x64_make_inst_E2G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, scf_register_x64_t* r_src);
+scf_instruction_t* x64_make_inst_G2E(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, scf_register_t* r_src);
+scf_instruction_t* x64_make_inst_E2G(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, scf_register_t* r_src);
 
-scf_instruction_t* x64_make_inst_P2G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, scf_register_x64_t* r_base, int32_t offset);
-scf_instruction_t* x64_make_inst_G2P(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, int32_t offset, scf_register_x64_t* r_src);
-scf_instruction_t* x64_make_inst_I2P(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, int32_t offset, uint8_t* imm, int size);
+scf_instruction_t* x64_make_inst_P2G(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst,  scf_register_t* r_base, int32_t offset);
+scf_instruction_t* x64_make_inst_G2P(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, int32_t offset, scf_register_t* r_src);
+scf_instruction_t* x64_make_inst_I2P(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, int32_t offset, uint8_t* imm, int size);
 
-scf_instruction_t* x64_make_inst_SIB2G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst,  scf_register_x64_t* r_base,  scf_register_x64_t* r_index, int32_t scale, int32_t disp);
-scf_instruction_t* x64_make_inst_G2SIB(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, scf_register_x64_t* r_index, int32_t scale, int32_t disp, scf_register_x64_t* r_src);
-scf_instruction_t* x64_make_inst_I2SIB(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, scf_register_x64_t* r_index, int32_t scale, int32_t disp, uint8_t* imm, int32_t size);
+scf_instruction_t* x64_make_inst_SIB2G(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst,  scf_register_t* r_base,  scf_register_t* r_index, int32_t scale, int32_t disp);
+scf_instruction_t* x64_make_inst_G2SIB(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, scf_register_t* r_index, int32_t scale, int32_t disp, scf_register_t* r_src);
+scf_instruction_t* x64_make_inst_I2SIB(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, scf_register_t* r_index, int32_t scale, int32_t disp, uint8_t* imm, int32_t size);
 
-scf_instruction_t* x64_make_inst_SIB(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base,  scf_register_x64_t* r_index, int32_t scale, int32_t disp, int size);
-scf_instruction_t* x64_make_inst_P(  scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, int32_t offset, int size);
+scf_instruction_t* x64_make_inst_SIB(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, scf_register_t* r_index, int32_t scale, int32_t disp, int size);
+scf_instruction_t* x64_make_inst_P  (scf_x64_OpCode_t* OpCode, scf_register_t* r_base, int32_t offset, int size);
 
 int x64_float_OpCode_type(int OpCode_type, int var_type);
 
@@ -136,16 +136,12 @@ int x64_shift_assign(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
 int x64_binary_assign(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
 
 int x64_binary_assign_dereference(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
-
-int x64_binary_assign_pointer(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
-
+int x64_binary_assign_pointer    (scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
 int x64_binary_assign_array_index(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
 
-int x64_unary_assign_dereference(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
-
-int x64_unary_assign_pointer(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
-
-int x64_unary_assign_array_index(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
+int x64_unary_assign_dereference (scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
+int x64_unary_assign_pointer     (scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
+int x64_unary_assign_array_index (scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type);
 
 
 int x64_inst_int_mul(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c, scf_function_t* f);
index e9ff6dd5db5aa37b482a45c7a9068dab4bdc8e12..011d1701d2441554eba034846513efbc2cb41922 100644 (file)
@@ -32,7 +32,7 @@ void x64_init_bb_colors(scf_basic_block_t* bb)
                        printf("color: %ld, loaded: %d", dn->color, dn->loaded);
 
                        if (dn->color > 0) {
-                               scf_register_x64_t* r = x64_find_register_color(dn->color);
+                               scf_register_t* r = x64_find_register_color(dn->color);
                                printf(", reg: %s", r->name);
                        }
                        printf("\n");
@@ -107,7 +107,7 @@ intptr_t x64_bb_find_color(scf_vector_t* dn_colors, scf_dag_node_t* dn)
 int x64_bb_load_dn(intptr_t color, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_basic_block_t* bb, scf_function_t* f)
 {
        scf_variable_t*     v = dn->var;
-       scf_register_x64_t* r;
+       scf_register_t* r;
        scf_instruction_t*  inst;
 
        int inst_bytes;
@@ -138,7 +138,7 @@ int x64_bb_load_dn(intptr_t color, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_ba
 int x64_bb_save_dn(intptr_t color, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_basic_block_t* bb, scf_function_t* f)
 {
        scf_variable_t*     v = dn->var;
-       scf_register_x64_t* r;
+       scf_register_t* r;
        scf_instruction_t*  inst;
 
        int inst_bytes;
@@ -290,7 +290,7 @@ int x64_load_bb_colors(scf_basic_block_t* bb, scf_bb_group_t* bbg, scf_function_
                }
 
                if (color != dn->color && color > 0) {
-                       scf_register_x64_t* r = x64_find_register_color(color);
+                       scf_register_t* r = x64_find_register_color(color);
 
                        scf_vector_del(r->dag_nodes, dn);
                }
@@ -309,7 +309,7 @@ int x64_load_bb_colors(scf_basic_block_t* bb, scf_bb_group_t* bbg, scf_function_
                        printf("v_%#lx", 0xffff & (uintptr_t)v);
 
                if (dn->color > 0) {
-                       scf_register_x64_t* r = x64_find_register_color(dn->color);
+                       scf_register_t* r = x64_find_register_color(dn->color);
 
                        printf(", %s", r->name);
                }
@@ -386,12 +386,12 @@ int x64_fix_bb_colors(scf_basic_block_t* bb, scf_bb_group_t* bbg, scf_function_t
 
 int x64_load_bb_colors2(scf_basic_block_t* bb, scf_bb_group_t* bbg, scf_function_t* f)
 {
-       scf_register_x64_t* r;
        scf_basic_block_t*  prev;
        scf_dn_status_t*    ds;
        scf_dn_status_t*    ds2;
        scf_dag_node_t*     dn;
        scf_variable_t*     v;
+       scf_register_t*     r;
 
        int i;
        int j;
index 1dfa793ddc84d69ec2bbf7d58891aaf242da3b9a..52fd1a1eda2b8c75ebc449f6e06bed0800c46818 100644 (file)
@@ -104,7 +104,7 @@ static int _x64_inst_call_stack_size(scf_3ac_code_t* c)
        return stack_size;
 }
 
-static int _x64_load_const_arg(scf_register_x64_t* rabi, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
+static int _x64_load_const_arg(scf_register_t* rabi, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
 {
        scf_instruction_t*  inst;
        scf_x64_OpCode_t*   lea;
@@ -176,7 +176,7 @@ static int _x64_load_const_arg(scf_register_x64_t* rabi, scf_dag_node_t* dn, scf
 
 static int _x64_inst_call_argv(scf_3ac_code_t* c, scf_function_t* f)
 {
-       scf_register_x64_t* rsp  = x64_find_register("rsp");
+       scf_register_t* rsp  = x64_find_register("rsp");
 
        scf_x64_OpCode_t*   lea;
        scf_x64_OpCode_t*   mov;
@@ -189,9 +189,9 @@ static int _x64_inst_call_argv(scf_3ac_code_t* c, scf_function_t* f)
        for (i = c->srcs->size - 1; i >= 1; i--) {
                scf_3ac_operand_t*  src   = c->srcs->data[i];
                scf_variable_t*     v     = src->dag_node->var;
-               scf_register_x64_t* rd    = src->rabi;
-               scf_register_x64_t* rabi  = src->dag_node->rabi2;
-               scf_register_x64_t* rs    = NULL;
+               scf_register_t* rd    = src->rabi;
+               scf_register_t* rabi  = src->dag_node->rabi2;
+               scf_register_t* rs    = NULL;
 
                int size     = x64_variable_size(v);
                int is_float = scf_variable_float(v);
@@ -300,7 +300,7 @@ static int _x64_inst_call_argv(scf_3ac_code_t* c, scf_function_t* f)
 
 static int _x64_call_save_ret_regs(scf_3ac_code_t* c, scf_function_t* f, scf_function_t* pf)
 {
-       scf_register_x64_t* r;
+       scf_register_t* r;
        scf_variable_t*     v;
 
        int i;
@@ -329,9 +329,9 @@ static int _x64_call_save_ret_regs(scf_3ac_code_t* c, scf_function_t* f, scf_fun
        return 0;
 }
 
-static int _x64_dst_reg_valid(scf_register_x64_t* rd, scf_register_x64_t** updated_regs, int nb_updated, int abi_idx, int abi_total)
+static int _x64_dst_reg_valid(scf_register_t* rd, scf_register_t** updated_regs, int nb_updated, int abi_idx, int abi_total)
 {
-       scf_register_x64_t* r;
+       scf_register_t* r;
 
        int i;
        for (i = 0; i < nb_updated; i++) {
@@ -353,14 +353,14 @@ static int _x64_dst_reg_valid(scf_register_x64_t* rd, scf_register_x64_t** updat
        return 1;
 }
 
-static int _x64_call_update_dsts(scf_3ac_code_t* c, scf_function_t* f, scf_register_x64_t** updated_regs, int max_updated)
+static int _x64_call_update_dsts(scf_3ac_code_t* c, scf_function_t* f, scf_register_t** updated_regs, int max_updated)
 {
        scf_3ac_operand_t*  dst;
        scf_dag_node_t*     dn;
        scf_variable_t*     v;
 
-       scf_register_x64_t* rd;
-       scf_register_x64_t* rs;
+       scf_register_t* rd;
+       scf_register_t* rs;
        scf_x64_OpCode_t*   mov;
 
        int nb_float   = 0;
@@ -514,8 +514,8 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                        return -ENOMEM;
        }
 
-       scf_register_x64_t* rsp  = x64_find_register("rsp");
-       scf_register_x64_t* rax  = x64_find_register("rax");
+       scf_register_t* rsp  = x64_find_register("rsp");
+       scf_register_t* rax  = x64_find_register("rax");
 //     scf_x64_OpCode_t*   xor;
        scf_x64_OpCode_t*   mov;
        scf_x64_OpCode_t*   sub;
@@ -565,7 +565,7 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        inst = x64_make_inst_I2G(mov, rax, (uint8_t*)&imm, sizeof(imm));
        X64_INST_ADD_CHECK(c->instructions, inst);
 
-       scf_register_x64_t* saved_regs[X64_ABI_CALLER_SAVES_NB];
+       scf_register_t* saved_regs[X64_ABI_CALLER_SAVES_NB];
 
        int save_size = x64_caller_save_regs(c->instructions, x64_abi_caller_saves, X64_ABI_CALLER_SAVES_NB, stack_size, saved_regs);
        if (save_size < 0) {
@@ -602,7 +602,7 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
                if (src0->dag_node->color > 0) {
 
-                       scf_register_x64_t* r_pf = NULL;
+                       scf_register_t* r_pf = NULL;
 
                        ret = x64_select_reg(&r_pf, src0->dag_node, c, f, 1);
                        if (ret < 0) {
@@ -632,7 +632,7 @@ static int _x64_inst_call_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        }
 
        int nb_updated = 0;
-       scf_register_x64_t* updated_regs[X64_ABI_RET_NB * 2];
+       scf_register_t* updated_regs[X64_ABI_RET_NB * 2];
 
        if (pf->rets && pf->rets->size > 0 && c->dsts) {
 
@@ -686,7 +686,7 @@ static int _x64_inst_unary(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type
        }
 
        scf_instruction_t*  inst   = NULL;
-       scf_register_x64_t* rd     = NULL;
+       scf_register_t* rd     = NULL;
        scf_variable_t*     var    = dst->dag_node->var;
 
        scf_x64_OpCode_t*   OpCode = x64_find_OpCode(OpCode_type, var->size, var->size, SCF_X64_E);
@@ -730,7 +730,7 @@ static int _x64_inst_unary_assign(scf_native_t* ctx, scf_3ac_code_t* c, int OpCo
        }
 
        scf_instruction_t*  inst   = NULL;
-       scf_register_x64_t* rs     = NULL;
+       scf_register_t* rs     = NULL;
        scf_variable_t*     var    = src->dag_node->var;
 
        scf_x64_OpCode_t*   OpCode = x64_find_OpCode(OpCode_type, var->size, var->size, SCF_X64_E);
@@ -784,7 +784,7 @@ static int _x64_inst_unary_post_assign(scf_native_t* ctx, scf_3ac_code_t* c, int
        }
 
        scf_instruction_t*  inst   = NULL;
-       scf_register_x64_t* rs     = NULL;
+       scf_register_t* rs     = NULL;
        scf_variable_t*     var    = src->dag_node->var;
 
        int ret = x64_inst_op2(SCF_X64_MOV, dst->dag_node, src->dag_node, c, f);
@@ -835,8 +835,8 @@ static int _x64_inst_neg_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                return _x64_inst_unary(ctx, c, SCF_X64_NEG);
 
        scf_instruction_t*  inst = NULL;
-       scf_register_x64_t* rd   = NULL;
-       scf_register_x64_t* rs   = NULL;
+       scf_register_t* rd   = NULL;
+       scf_register_t* rs   = NULL;
        scf_x64_OpCode_t*   pxor = x64_find_OpCode(SCF_X64_PXOR,  8, 8, SCF_X64_E2G);
        scf_x64_OpCode_t*   sub  = x64_find_OpCode(SCF_X64_SUBSS, 4, 4, SCF_X64_E2G);
 
@@ -933,7 +933,7 @@ static int _x64_inst_assign_array_index(scf_native_t* ctx, scf_3ac_code_t* c, in
        scf_variable_t*     vb     = base->dag_node->var;
        scf_variable_t*     vs     = src ->dag_node->var;
 
-       scf_register_x64_t* rs     = NULL;
+       scf_register_t* rs     = NULL;
        x64_sib_t           sib    = {0};
 
        scf_x64_OpCode_t*   OpCode;
@@ -1042,7 +1042,7 @@ static int _x64_inst_array_index(scf_native_t* ctx, scf_3ac_code_t* c, int lea_f
        scf_variable_t*     vi  = index->dag_node->var;
        scf_variable_t*     vs  = scale->dag_node->var;
 
-       scf_register_x64_t* rd  = NULL;
+       scf_register_t* rd  = NULL;
        x64_sib_t           sib = {0};
 
        scf_x64_OpCode_t*   OpCode;
@@ -1116,7 +1116,7 @@ static int _x64_inst_address_of_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
        scf_3ac_operand_t*  dst  = c->dsts->data[0];
        scf_3ac_operand_t*  src  = c->srcs->data[0];
-       scf_register_x64_t* rd   = NULL;
+       scf_register_t* rd   = NULL;
        scf_rela_t*         rela = NULL;
 
        scf_x64_OpCode_t*   lea;
@@ -1330,7 +1330,7 @@ static int _x64_inst_cast_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        scf_x64_OpCode_t*   lea;
        scf_instruction_t*  inst;
 
-       scf_register_x64_t* rd   = NULL;
+       scf_register_t* rd   = NULL;
        scf_rela_t*         rela = NULL;
 
        scf_variable_t*     vd   = dst->dag_node->var;
@@ -1462,10 +1462,10 @@ static int _x64_inst_return_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        scf_instruction_t*  inst = NULL;
        scf_rela_t*         rela = NULL;
 
-       scf_register_x64_t*     rd   = NULL;
-       scf_register_x64_t*     rs   = NULL;
-       scf_register_x64_t* rsp  = x64_find_register("rsp");
-       scf_register_x64_t* rbp  = x64_find_register("rbp");
+       scf_register_t* rd   = NULL;
+       scf_register_t* rs   = NULL;
+       scf_register_t* rsp  = x64_find_register("rsp");
+       scf_register_t* rbp  = x64_find_register("rbp");
 
        scf_x64_OpCode_t*   pop;
        scf_x64_OpCode_t*   mov;
@@ -1582,10 +1582,10 @@ static int _x64_inst_memset_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        scf_3ac_operand_t*  count = c->srcs->data[2];
        scf_instruction_t*  inst  = NULL;
 
-       scf_register_x64_t*     rax   = x64_find_register("rax");
-       scf_register_x64_t*     rcx   = x64_find_register("rcx");
-       scf_register_x64_t*     rdi   = x64_find_register("rdi");
-       scf_register_x64_t*     rd;
+       scf_register_t* rax   = x64_find_register("rax");
+       scf_register_t* rcx   = x64_find_register("rcx");
+       scf_register_t* rdi   = x64_find_register("rdi");
+       scf_register_t* rd;
        scf_x64_OpCode_t*   mov;
        scf_x64_OpCode_t*   stos;
 
@@ -1654,9 +1654,9 @@ static int _x64_inst_end_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                        return -ENOMEM;
        }
 
-       scf_register_x64_t* rsp  = x64_find_register("rsp");
-       scf_register_x64_t* rbp  = x64_find_register("rbp");
-       scf_register_x64_t* r;
+       scf_register_t* rsp  = x64_find_register("rsp");
+       scf_register_t* rbp  = x64_find_register("rbp");
+       scf_register_t* r;
 
        scf_x64_OpCode_t*   pop  = x64_find_OpCode(SCF_X64_POP, 8, 8, SCF_X64_G);
        scf_x64_OpCode_t*   mov  = x64_find_OpCode(SCF_X64_MOV, 8, 8, SCF_X64_G2E);
@@ -1707,7 +1707,7 @@ static int _x64_inst_load_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        if (!c->dsts || c->dsts->size != 1)
                return -EINVAL;
 
-       scf_register_x64_t* r   = NULL;
+       scf_register_t* r   = NULL;
        scf_x64_context_t*  x64 = ctx->priv;
        scf_function_t*     f   = x64->f;
 
@@ -1756,7 +1756,7 @@ static int _x64_inst_reload_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        if (!c->dsts || c->dsts->size != 1)
                return -EINVAL;
 
-       scf_register_x64_t* r   = NULL;
+       scf_register_t* r   = NULL;
        scf_x64_context_t*  x64 = ctx->priv;
        scf_function_t*     f   = x64->f;
 
@@ -1926,7 +1926,7 @@ static int _x64_inst_push_rax_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                        return -ENOMEM;
        }
 
-       scf_register_x64_t* rax  = x64_find_register("rax");
+       scf_register_t* rax  = x64_find_register("rax");
        scf_x64_OpCode_t*   push;
        scf_instruction_t*  inst;
 
@@ -1944,7 +1944,7 @@ static int _x64_inst_pop_rax_handler(scf_native_t* ctx, scf_3ac_code_t* c)
                        return -ENOMEM;
        }
 
-       scf_register_x64_t* rax  = x64_find_register("rax");
+       scf_register_t* rax  = x64_find_register("rax");
        scf_x64_OpCode_t*   pop;
        scf_instruction_t*  inst;
 
@@ -1981,9 +1981,9 @@ static int _x64_inst_va_start_handler(scf_native_t* ctx, scf_3ac_code_t* c)
        scf_loge("c->srcs->size: %d\n", c->srcs->size);
        assert(3 == c->srcs->size);
 
-       scf_register_x64_t* rbp   = x64_find_register("rbp");
-       scf_register_x64_t* rptr  = NULL;
-       scf_register_x64_t* rap   = NULL;
+       scf_register_t* rbp   = x64_find_register("rbp");
+       scf_register_t* rptr  = NULL;
+       scf_register_t* rap   = NULL;
        scf_instruction_t*  inst  = NULL;
        scf_3ac_operand_t*  ap    = c->srcs->data[0];
        scf_3ac_operand_t*  ptr   = c->srcs->data[2];
@@ -2047,9 +2047,9 @@ static int _x64_inst_va_end_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
        assert(2 == c->srcs->size);
 
-       scf_register_x64_t* rbp  = x64_find_register("rbp");
-       scf_register_x64_t* rptr = NULL;
-       scf_register_x64_t* rap  = NULL;
+       scf_register_t* rbp  = x64_find_register("rbp");
+       scf_register_t* rptr = NULL;
+       scf_register_t* rap  = NULL;
        scf_instruction_t*  inst = NULL;
        scf_3ac_operand_t*  ap   = c->srcs->data[0];
        scf_3ac_operand_t*  ptr  = c->srcs->data[1];
@@ -2107,11 +2107,11 @@ static int _x64_inst_va_arg_handler(scf_native_t* ctx, scf_3ac_code_t* c)
 
        assert(1 == c->dsts->size && 3 == c->srcs->size);
 
-       scf_register_x64_t* rbp  = x64_find_register("rbp");
-       scf_register_x64_t* rd   = NULL; // result
-       scf_register_x64_t* rap  = NULL; // ap
-       scf_register_x64_t* rptr = NULL; // ptr
        scf_instruction_t*  inst = NULL;
+       scf_register_t*     rbp  = x64_find_register("rbp");
+       scf_register_t*     rd   = NULL; // result
+       scf_register_t*     rap  = NULL; // ap
+       scf_register_t*     rptr = NULL; // ptr
 
        scf_instruction_t*  inst_jge = NULL;
        scf_instruction_t*  inst_jmp = NULL;
index abd3d195f188392d86c6bacc157341776299a8c4..293bfa5fc5ef7424d3e15c5bf571079c8c129448 100644 (file)
@@ -1,9 +1,9 @@
 #include"scf_x64.h"
 
-static int _binary_assign_sib_float(scf_register_x64_t* rb, scf_register_x64_t* ri, int32_t scale, int32_t disp, scf_dag_node_t* src, scf_3ac_code_t* c, scf_function_t* f, int OpCode_type)
+static int _binary_assign_sib_float(scf_register_t* rb, scf_register_t* ri, int32_t scale, int32_t disp, scf_dag_node_t* src, scf_3ac_code_t* c, scf_function_t* f, int OpCode_type)
 {
        scf_variable_t*     v    = src->var;
-       scf_register_x64_t* rs   = NULL;
+       scf_register_t* rs   = NULL;
        scf_rela_t*         rela = NULL;
 
        scf_x64_OpCode_t*   OpCode;
@@ -60,10 +60,10 @@ end:
 static int _binary_assign_sib_int(x64_sib_t* sib, scf_dag_node_t* src, scf_3ac_code_t* c, scf_function_t* f, int OpCode_type)
 {
        scf_variable_t*     v  = src->var;
-       scf_register_x64_t* rs = NULL;
+       scf_register_t* rs = NULL;
 
-       scf_register_x64_t* rb = sib->base;
-       scf_register_x64_t* ri = sib->index;
+       scf_register_t* rb = sib->base;
+       scf_register_t* ri = sib->index;
        int32_t scale          = sib->scale;
        int32_t disp           = sib->disp;
 
@@ -189,7 +189,7 @@ static int _binary_SIB2G(scf_native_t* ctx, scf_3ac_code_t* c, int OpCode_type,
        scf_variable_t*     vb  = base ->dag_node->var;
        scf_variable_t*     vi  = index->dag_node->var;
 
-       scf_register_x64_t* rd  = NULL;
+       scf_register_t* rd  = NULL;
        x64_sib_t           sib = {0};
 
        scf_x64_OpCode_t*   lea;
@@ -307,7 +307,7 @@ int x64_inst_pointer(scf_native_t* ctx, scf_3ac_code_t* c, int lea_flag)
        scf_variable_t*     vb  = base  ->dag_node->var;
        scf_variable_t*     vm  = member->dag_node->var;
 
-       scf_register_x64_t* rd  = NULL;
+       scf_register_t*     rd  = NULL;
        x64_sib_t           sib = {0};
 
        scf_x64_OpCode_t*   lea;
index b24eebd9cae1e000bd4d375e75b2482ea3491404..ad7f0981e8cd5cacfb9901cbc2ffcfa4e89588ed 100644 (file)
@@ -13,8 +13,8 @@ static int _inst_cmp(scf_dag_node_t* src0, scf_dag_node_t* src1, scf_3ac_code_t*
 
        scf_x64_OpCode_t*   cmp;
        scf_instruction_t*  inst;
-       scf_register_x64_t* rs1;
-       scf_register_x64_t* rs0  = NULL;
+       scf_register_t* rs1;
+       scf_register_t* rs0  = NULL;
        scf_rela_t*         rela = NULL;
 
        X64_SELECT_REG_CHECK(&rs0, src0, c, f, 1);
@@ -86,7 +86,7 @@ static int _inst_set(int setcc_type, scf_dag_node_t* dst, scf_3ac_code_t* c, scf
 
        scf_x64_OpCode_t*   mov;
        scf_instruction_t*  inst;
-       scf_register_x64_t* rd;
+       scf_register_t* rd;
        scf_rela_t*         rela = NULL;
 
        X64_SELECT_REG_CHECK(&rd, dst, c, f, 0);
@@ -121,7 +121,7 @@ int x64_inst_teq(scf_native_t* ctx, scf_3ac_code_t* c)
 
        scf_x64_OpCode_t*   test;
        scf_instruction_t*  inst;
-       scf_register_x64_t* rs;
+       scf_register_t*     rs;
 
        if (!src || !src->dag_node)
                return -EINVAL;
index 52ad51b1b14876204b7e5a79d730325507ce0261..cd113905072300a35b8a0fdfb59811ac2547a5a7 100644 (file)
@@ -56,8 +56,8 @@ static int _x64_inst_op2_imm(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_
 {
        scf_x64_OpCode_t*   OpCode;
        scf_instruction_t*  inst;
-       scf_register_x64_t* rd   = NULL;
-       scf_register_x64_t* rs   = NULL;
+       scf_register_t* rd   = NULL;
+       scf_register_t* rs   = NULL;
        scf_rela_t*         rela = NULL;
 
        assert( scf_variable_const(src->var));
@@ -157,7 +157,7 @@ static int _x64_inst_op2_imm_str(int OpCode_type, scf_dag_node_t* dst, scf_dag_n
                return -EINVAL;
        }
 
-       scf_register_x64_t* rd   = NULL;
+       scf_register_t* rd   = NULL;
        scf_instruction_t*  inst = NULL;
        scf_x64_OpCode_t*   lea  = x64_find_OpCode(SCF_X64_LEA, 8, 8, SCF_X64_E2G);
        scf_rela_t*         rela = NULL;
@@ -185,8 +185,8 @@ int x64_inst_op2(int OpCode_type, scf_dag_node_t* dst, scf_dag_node_t* src, scf_
        assert(0 != dst->color);
 
        scf_x64_OpCode_t*   OpCode = NULL;
-       scf_register_x64_t* rs     = NULL;
-       scf_register_x64_t* rd     = NULL;
+       scf_register_t* rs     = NULL;
+       scf_register_t* rd     = NULL;
        scf_instruction_t*  inst   = NULL;
        scf_rela_t*         rela   = NULL;
 
@@ -260,8 +260,8 @@ int x64_inst_movx(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c, s
        scf_x64_OpCode_t*   xor;
 
        scf_instruction_t*  inst;
-       scf_register_x64_t* rs;
-       scf_register_x64_t* rd = NULL;
+       scf_register_t* rs;
+       scf_register_t* rd = NULL;
 
        X64_SELECT_REG_CHECK(&rd, dst, c, f, 0);
 
@@ -312,8 +312,8 @@ int x64_inst_float_cast(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t
        scf_x64_OpCode_t*   OpCode;
 
        scf_instruction_t*  inst;
-       scf_register_x64_t* rs = NULL;
-       scf_register_x64_t* rd = NULL;
+       scf_register_t*     rs = NULL;
+       scf_register_t*     rd = NULL;
 
        X64_SELECT_REG_CHECK(&rd, dst, c, f, 0);
 
index 371762093588c29c0d956135017b04f9c8a20dcb..5400f1dcc34d146a7d3709d13bfcc978bd7d36f4 100644 (file)
@@ -7,21 +7,21 @@ int x64_inst_int_div(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c
        int size = x64_variable_size(src->var);
        int ret;
 
-       scf_register_x64_t* rs   = NULL;
-       scf_register_x64_t* rd   = NULL;
        scf_instruction_t*  inst = NULL;
+       scf_register_t*     rs   = NULL;
+       scf_register_t*     rd   = NULL;
+       scf_register_t*     rl   = x64_find_register_type_id_bytes(0, SCF_X64_REG_AX, size);
+       scf_register_t*     rh;
 
        scf_x64_OpCode_t*       mov;
        scf_x64_OpCode_t*       cdq;
        scf_x64_OpCode_t*       xor;
        scf_x64_OpCode_t*       div;
 
-       scf_register_x64_t* rl   = x64_find_register_type_id_bytes(0, SCF_X64_REG_AX, size);
-       scf_register_x64_t* rh;
        if (1 == size)
-               rh   = x64_find_register("ah");
+               rh = x64_find_register("ah");
        else
-               rh   = x64_find_register_type_id_bytes(0, SCF_X64_REG_DX, size);
+               rh = x64_find_register_type_id_bytes(0, SCF_X64_REG_DX, size);
 
        int      src_literal = src->var->const_literal_flag;
        intptr_t src_color   = src->color;
@@ -94,7 +94,7 @@ int x64_inst_int_div(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c
                X64_RELA_ADD_CHECK(f->data_relas, rela, c, src->var, NULL);
        }
 
-       scf_register_x64_t* result;
+       scf_register_t* result;
        if (mod_flag)
                result = rh;
        else
index 8395a5d31c1310e7fea20f97a97174c9aa6eaa4c..72527f5fab37682e85c243bdf1e97b930c6a40a8 100644 (file)
@@ -1,6 +1,6 @@
 #include"scf_x64.h"
 
-static int _int_mul_src(scf_x64_OpCode_t* mul, scf_register_x64_t* rh, scf_dag_node_t* src, scf_3ac_code_t* c, scf_function_t* f)
+static int _int_mul_src(scf_x64_OpCode_t* mul, scf_register_t* rh, scf_dag_node_t* src, scf_3ac_code_t* c, scf_function_t* f)
 {
        int size = src->var->size;
 
@@ -31,19 +31,19 @@ int x64_inst_int_mul(scf_dag_node_t* dst, scf_dag_node_t* src, scf_3ac_code_t* c
 {
        assert(0 != dst->color);
 
-       scf_register_x64_t* rs   = NULL;
-       scf_register_x64_t* rd   = NULL;
        scf_instruction_t*  inst = NULL;
        scf_rela_t*         rela = NULL;
 
        int size = src->var->size;
        int ret;
 
-       scf_x64_OpCode_t*       mov = x64_find_OpCode(SCF_X64_MOV,  size, size, SCF_X64_G2E);
-       scf_register_x64_t* rl  = x64_find_register_type_id_bytes(0, SCF_X64_REG_AX, size);
-       scf_register_x64_t* rh;
        scf_x64_OpCode_t*       mul;
        scf_x64_OpCode_t*       mov2;
+       scf_x64_OpCode_t*       mov = x64_find_OpCode(SCF_X64_MOV,  size, size, SCF_X64_G2E);
+       scf_register_t*     rs  = NULL;
+       scf_register_t*     rd  = NULL;
+       scf_register_t*     rl  = x64_find_register_type_id_bytes(0, SCF_X64_REG_AX, size);
+       scf_register_t*     rh;
 
        if (1 == size)
                rh = x64_find_register_type_id_bytes(0, SCF_X64_REG_AH, size);
index 0654ca9c89d0b892441d2690bc0bc6fbef38905a..9c801ae2d84b09378c91ad871f219d37b8ae77b9 100644 (file)
@@ -2,8 +2,8 @@
 
 static int _shift_count(scf_dag_node_t* count, scf_3ac_code_t* c, scf_function_t* f)
 {
-       scf_register_x64_t* rc   = NULL;
-       scf_register_x64_t* cl   = x64_find_register("cl");
+       scf_register_t*     rc   = NULL;
+       scf_register_t*     cl   = x64_find_register("cl");
 
        scf_instruction_t*  inst;
        scf_x64_OpCode_t*   mov;
@@ -59,7 +59,7 @@ static int _x64_shift(scf_native_t* ctx, scf_3ac_code_t* c, scf_dag_node_t* dst,
                        return -ENOMEM;
        }
 
-       scf_register_x64_t* rd   = NULL;
+       scf_register_t* rd   = NULL;
 
        scf_instruction_t*  inst;
        scf_x64_OpCode_t*   mov;
index 3416c109438866b0bb5ee851474d090e4e3c50cf..fd4879d6b68bf8cfcecc8ec9a565e409d24b1bdf 100644 (file)
@@ -1,9 +1,9 @@
 #include"scf_x64.h"
 
 static scf_instruction_t* _x64_make_OpCode(scf_x64_OpCode_t* OpCode, int bytes,
-               scf_register_x64_t* r,
-               scf_register_x64_t* b,
-               scf_register_x64_t* x)
+               scf_register_t* r,
+               scf_register_t* b,
+               scf_register_t* x)
 {
        scf_instruction_t* inst = calloc(1, sizeof(scf_instruction_t));
        if (!inst)
@@ -222,7 +222,7 @@ scf_instruction_t* x64_make_inst(scf_x64_OpCode_t* OpCode, int size)
        return _x64_make_OpCode(OpCode, size, NULL, NULL, NULL);
 }
 
-scf_instruction_t* x64_make_inst_G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r)
+scf_instruction_t* x64_make_inst_G(scf_x64_OpCode_t* OpCode, scf_register_t* r)
 {
        scf_instruction_t* inst = _x64_make_OpCode(OpCode, r->bytes, NULL, r, NULL);
        if (!inst)
@@ -241,7 +241,7 @@ scf_instruction_t* x64_make_inst_G(scf_x64_OpCode_t* OpCode, scf_register_x64_t*
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_I2G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, uint8_t* imm, int size)
+scf_instruction_t* x64_make_inst_I2G(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, uint8_t* imm, int size)
 {
        scf_instruction_t* inst = _x64_make_OpCode(OpCode, r_dst->bytes, NULL, r_dst, NULL);
        if (!inst)
@@ -265,7 +265,7 @@ scf_instruction_t* x64_make_inst_I2G(scf_x64_OpCode_t* OpCode, scf_register_x64_
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_E(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r)
+scf_instruction_t* x64_make_inst_E(scf_x64_OpCode_t* OpCode, scf_register_t* r)
 {
        scf_instruction_t* inst = _x64_make_OpCode(OpCode, r->bytes, NULL, r, NULL);
        if (!inst)
@@ -293,7 +293,7 @@ scf_instruction_t* x64_make_inst_E(scf_x64_OpCode_t* OpCode, scf_register_x64_t*
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_I2E(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, uint8_t* imm, int size)
+scf_instruction_t* x64_make_inst_I2E(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, uint8_t* imm, int size)
 {
        scf_instruction_t* inst = x64_make_inst_E(OpCode, r_dst);
        if (!inst)
@@ -316,9 +316,9 @@ scf_instruction_t* x64_make_inst_I2E(scf_x64_OpCode_t* OpCode, scf_register_x64_
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v, scf_register_x64_t* r_base)
+scf_instruction_t* x64_make_inst_M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v, scf_register_t* r_base)
 {
-       scf_register_x64_t* rbp = x64_find_register("rbp");
+       scf_register_t* rbp = x64_find_register("rbp");
 
        uint32_t base;
        int32_t  offset;
@@ -382,9 +382,9 @@ scf_instruction_t* x64_make_inst_M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode,
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_I2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v_dst, scf_register_x64_t* r_base, uint8_t* imm, int32_t size)
+scf_instruction_t* x64_make_inst_I2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v_dst, scf_register_t* r_base, uint8_t* imm, int32_t size)
 {
-       scf_register_x64_t* rbp = x64_find_register("rbp");
+       scf_register_t* rbp = x64_find_register("rbp");
 
        uint32_t base;
        int32_t  offset;
@@ -445,14 +445,14 @@ scf_instruction_t* x64_make_inst_I2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCod
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_G2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v_dst, scf_register_x64_t* r_base, scf_register_x64_t* r_src)
+scf_instruction_t* x64_make_inst_G2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_variable_t* v_dst, scf_register_t* r_base, scf_register_t* r_src)
 {
        if (OpCode->ModRM_OpCode_used) {
                scf_loge("ModRM opcode invalid\n");
                return NULL;
        }
 
-       scf_register_x64_t* rbp  = x64_find_register("rbp");
+       scf_register_t* rbp  = x64_find_register("rbp");
        scf_instruction_t*  inst = NULL;
 
        uint32_t base;
@@ -499,14 +499,14 @@ scf_instruction_t* x64_make_inst_G2M(scf_rela_t** prela, scf_x64_OpCode_t* OpCod
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_M2G(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, scf_register_x64_t* r_base, scf_variable_t* v_src)
+scf_instruction_t* x64_make_inst_M2G(scf_rela_t** prela, scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, scf_register_t* r_base, scf_variable_t* v_src)
 {
        if (OpCode->ModRM_OpCode_used) {
                scf_loge("ModRM opcode invalid\n");
                return NULL;
        }
 
-       scf_register_x64_t* rbp  = x64_find_register("rbp");
+       scf_register_t* rbp  = x64_find_register("rbp");
        scf_instruction_t*  inst = NULL;
 
        uint32_t base;
@@ -552,7 +552,7 @@ scf_instruction_t* x64_make_inst_M2G(scf_rela_t** prela, scf_x64_OpCode_t* OpCod
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_P2G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, scf_register_x64_t* r_base, int32_t offset)
+scf_instruction_t* x64_make_inst_P2G(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, scf_register_t* r_base, int32_t offset)
 {
        if (OpCode->ModRM_OpCode_used) {
                scf_loge("ModRM opcode invalid\n");
@@ -576,7 +576,7 @@ scf_instruction_t* x64_make_inst_P2G(scf_x64_OpCode_t* OpCode, scf_register_x64_
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_G2P(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, int32_t offset, scf_register_x64_t* r_src)
+scf_instruction_t* x64_make_inst_G2P(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, int32_t offset, scf_register_t* r_src)
 {
        if (OpCode->ModRM_OpCode_used) {
                scf_loge("ModRM opcode invalid\n");
@@ -611,7 +611,7 @@ scf_instruction_t* x64_make_inst_G2P(scf_x64_OpCode_t* OpCode, scf_register_x64_
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_P(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, int32_t offset, int size)
+scf_instruction_t* x64_make_inst_P(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, int32_t offset, int size)
 {
        uint8_t reg = 0;
 
@@ -630,7 +630,7 @@ scf_instruction_t* x64_make_inst_P(scf_x64_OpCode_t* OpCode, scf_register_x64_t*
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_I2P(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, int32_t offset, uint8_t* imm, int size)
+scf_instruction_t* x64_make_inst_I2P(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, int32_t offset, uint8_t* imm, int size)
 {
        scf_instruction_t* inst = x64_make_inst_P(OpCode, r_base, offset, size);
        if (!inst)
@@ -655,7 +655,7 @@ scf_instruction_t* x64_make_inst_I2P(scf_x64_OpCode_t* OpCode, scf_register_x64_
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_G2E(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, scf_register_x64_t* r_src)
+scf_instruction_t* x64_make_inst_G2E(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, scf_register_t* r_src)
 {
        if (OpCode->ModRM_OpCode_used) {
                scf_loge("ModRM opcode invalid\n");
@@ -679,7 +679,7 @@ scf_instruction_t* x64_make_inst_G2E(scf_x64_OpCode_t* OpCode, scf_register_x64_
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_E2G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst, scf_register_x64_t* r_src)
+scf_instruction_t* x64_make_inst_E2G(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst, scf_register_t* r_src)
 {
        if (OpCode->ModRM_OpCode_used) {
                scf_loge("ModRM opcode invalid\n");
@@ -703,7 +703,7 @@ scf_instruction_t* x64_make_inst_E2G(scf_x64_OpCode_t* OpCode, scf_register_x64_
        return inst;
 }
 
-scf_instruction_t* _x64_make_inst_SIB(scf_instruction_t* inst, scf_x64_OpCode_t* OpCode, uint32_t reg,  scf_register_x64_t* r_base,  scf_register_x64_t* r_index, int32_t scale, int32_t disp, int size)
+scf_instruction_t* _x64_make_inst_SIB(scf_instruction_t* inst, scf_x64_OpCode_t* OpCode, uint32_t reg,  scf_register_t* r_base,  scf_register_t* r_index, int32_t scale, int32_t disp, int size)
 {
        uint8_t ModRM = 0;
        scf_ModRM_setReg(&ModRM, reg);
@@ -756,7 +756,7 @@ scf_instruction_t* _x64_make_inst_SIB(scf_instruction_t* inst, scf_x64_OpCode_t*
        return inst;
 }
 
-scf_instruction_t* x64_make_inst_SIB(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base,  scf_register_x64_t* r_index, int32_t scale, int32_t disp, int size)
+scf_instruction_t* x64_make_inst_SIB(scf_x64_OpCode_t* OpCode, scf_register_t* r_base,  scf_register_t* r_index, int32_t scale, int32_t disp, int size)
 {
        scf_instruction_t* inst = _x64_make_OpCode(OpCode, size, NULL, r_base, r_index);
        if (!inst)
@@ -769,7 +769,7 @@ scf_instruction_t* x64_make_inst_SIB(scf_x64_OpCode_t* OpCode, scf_register_x64_
        return _x64_make_inst_SIB(inst, OpCode, reg, r_base, r_index, scale, disp, size);
 }
 
-scf_instruction_t* x64_make_inst_SIB2G(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_dst,  scf_register_x64_t* r_base,  scf_register_x64_t* r_index, int32_t scale, int32_t disp)
+scf_instruction_t* x64_make_inst_SIB2G(scf_x64_OpCode_t* OpCode, scf_register_t* r_dst,  scf_register_t* r_base,  scf_register_t* r_index, int32_t scale, int32_t disp)
 {
        if (OpCode->ModRM_OpCode_used) {
                scf_loge("ModRM opcode invalid\n");
@@ -791,7 +791,7 @@ scf_instruction_t* x64_make_inst_SIB2G(scf_x64_OpCode_t* OpCode, scf_register_x6
        return _x64_make_inst_SIB(inst, OpCode, r_dst->id, r_base, r_index, scale, disp, r_dst->bytes);
 }
 
-scf_instruction_t* x64_make_inst_G2SIB(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, scf_register_x64_t* r_index, int32_t scale, int32_t disp, scf_register_x64_t* r_src)
+scf_instruction_t* x64_make_inst_G2SIB(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, scf_register_t* r_index, int32_t scale, int32_t disp, scf_register_t* r_src)
 {
        if (OpCode->ModRM_OpCode_used) {
                scf_loge("ModRM opcode invalid\n");
@@ -813,7 +813,7 @@ scf_instruction_t* x64_make_inst_G2SIB(scf_x64_OpCode_t* OpCode, scf_register_x6
        return _x64_make_inst_SIB(inst, OpCode, r_src->id, r_base, r_index, scale, disp, r_src->bytes);
 }
 
-scf_instruction_t* x64_make_inst_I2SIB(scf_x64_OpCode_t* OpCode, scf_register_x64_t* r_base, scf_register_x64_t* r_index, int32_t scale, int32_t disp, uint8_t* imm, int32_t size)
+scf_instruction_t* x64_make_inst_I2SIB(scf_x64_OpCode_t* OpCode, scf_register_t* r_base, scf_register_t* r_index, int32_t scale, int32_t disp, uint8_t* imm, int32_t size)
 {
        uint32_t reg = 0;
        if (OpCode->ModRM_OpCode_used)
index 72e38abe771360c89c707064ed8d53e39661ff36..52cc854bd8dd1211ae5ce639bc1cf1945b3c92bf 100644 (file)
@@ -96,8 +96,8 @@ static int _x64_peephole_common(scf_vector_t* std_insts, scf_instruction_t* inst
                                assert(std->dst.flag);
 
                                inst2 = x64_make_inst_E2G((scf_x64_OpCode_t*)inst->OpCode,
-                                               (scf_register_x64_t*)inst->dst.base,
-                                               (scf_register_x64_t*)std->src.base);
+                                               (scf_register_t*)inst->dst.base,
+                                               (scf_register_t*)std->src.base);
                                if (!inst2)
                                        return -ENOMEM;
 
@@ -122,13 +122,13 @@ static int _x64_peephole_common(scf_vector_t* std_insts, scf_instruction_t* inst
 
                                        if (!inst->dst.index)
                                                inst2 = x64_make_inst_G2P((scf_x64_OpCode_t*)inst->OpCode,
-                                                               (scf_register_x64_t*)inst->dst.base, inst->dst.disp,
-                                                               (scf_register_x64_t*)std->src.base);
+                                                               (scf_register_t*)inst->dst.base, inst->dst.disp,
+                                                               (scf_register_t*)std->src.base);
                                        else
                                                inst2 = x64_make_inst_G2SIB((scf_x64_OpCode_t*)inst->OpCode,
-                                                               (scf_register_x64_t*)inst->dst.base,
-                                                               (scf_register_x64_t*)inst->dst.index, inst->dst.scale, inst->dst.disp,
-                                                               (scf_register_x64_t*)std->src.base);
+                                                               (scf_register_t*)inst->dst.base,
+                                                               (scf_register_t*)inst->dst.index, inst->dst.scale, inst->dst.disp,
+                                                               (scf_register_t*)std->src.base);
                                        if (!inst2)
                                                return -ENOMEM;
 
@@ -152,13 +152,13 @@ static int _x64_peephole_common(scf_vector_t* std_insts, scf_instruction_t* inst
 
                } else if (x64_inst_data_is_reg(&std->src)) {
 
-                       scf_register_x64_t* r0;
-                       scf_register_x64_t* r1;
+                       scf_register_t* r0;
+                       scf_register_t* r1;
 
                        if (x64_inst_data_is_reg(&inst->dst)) {
 
-                               r0 = (scf_register_x64_t*) std ->src.base;
-                               r1 = (scf_register_x64_t*) inst->dst.base;
+                               r0 = (scf_register_t*) std ->src.base;
+                               r1 = (scf_register_t*) inst->dst.base;
 
                                if (X64_COLOR_CONFLICT(r0->color, r1->color))
                                        assert(0 == scf_vector_del(std_insts, std));
@@ -206,8 +206,8 @@ static int _x64_peephole_cmp(scf_vector_t* std_insts, scf_instruction_t* inst)
                                goto check;
 
                        inst2 = x64_make_inst_E2G((scf_x64_OpCode_t*) inst->OpCode,
-                                       (scf_register_x64_t*) inst->dst.base,
-                                       (scf_register_x64_t*) inst->src.base);
+                                       (scf_register_t*) inst->dst.base,
+                                       (scf_register_t*) inst->src.base);
                        if (!inst2)
                                return -ENOMEM;
 
@@ -230,12 +230,12 @@ static int _x64_peephole_cmp(scf_vector_t* std_insts, scf_instruction_t* inst)
 
                        if (inst->src.imm_size > 0)
                                inst2 = x64_make_inst_I2E((scf_x64_OpCode_t*)inst->OpCode,
-                                               (scf_register_x64_t*)inst->dst.base,
+                                               (scf_register_t*)inst->dst.base,
                                                (uint8_t*)&inst->src.imm, inst->src.imm_size);
                        else
                                inst2 = x64_make_inst_G2E((scf_x64_OpCode_t*)inst->OpCode,
-                                               (scf_register_x64_t*)inst->dst.base,
-                                               (scf_register_x64_t*)inst->src.base);
+                                               (scf_register_t*)inst->dst.base,
+                                               (scf_register_t*)inst->src.base);
                        if (!inst2)
                                return -ENOMEM;
 
@@ -267,16 +267,16 @@ check:
 
 static void _x64_peephole_function(scf_vector_t* tmp_insts, scf_function_t* f, int jmp_back_flag)
 {
-       scf_register_x64_t* rax = x64_find_register("rax");
-       scf_register_x64_t* rsp = x64_find_register("rsp");
-       scf_register_x64_t* rbp = x64_find_register("rbp");
+       scf_register_t* rax = x64_find_register("rax");
+       scf_register_t* rsp = x64_find_register("rsp");
+       scf_register_t* rbp = x64_find_register("rbp");
 
-       scf_register_x64_t* rdi = x64_find_register("rdi");
-       scf_register_x64_t* rsi = x64_find_register("rsi");
-       scf_register_x64_t* rdx = x64_find_register("rdx");
-       scf_register_x64_t* rcx = x64_find_register("rcx");
-       scf_register_x64_t* r8  = x64_find_register("r8");
-       scf_register_x64_t* r9  = x64_find_register("r9");
+       scf_register_t* rdi = x64_find_register("rdi");
+       scf_register_t* rsi = x64_find_register("rsi");
+       scf_register_t* rdx = x64_find_register("rdx");
+       scf_register_t* rcx = x64_find_register("rcx");
+       scf_register_t* r8  = x64_find_register("r8");
+       scf_register_t* r9  = x64_find_register("r9");
 
        scf_instruction_t*  inst;
        scf_instruction_t*  inst2;
@@ -290,15 +290,15 @@ static void _x64_peephole_function(scf_vector_t* tmp_insts, scf_function_t* f, i
        for (i   = tmp_insts->size - 1; i >= 0; i--) {
                inst = tmp_insts->data[i];
 
-               scf_register_x64_t* r0;
-               scf_register_x64_t* r1;
+               scf_register_t* r0;
+               scf_register_t* r1;
 
                if (SCF_X64_PUSH == inst->OpCode->type)
                        continue;
 
                else if (SCF_X64_POP == inst->OpCode->type) {
 
-                       r0 = (scf_register_x64_t*)inst->dst.base;
+                       r0 = (scf_register_t*)inst->dst.base;
 
                        if (x64_inst_data_is_reg(&inst->dst)
                                        && (r0 == rax || r0 == rsp || r0 == rbp))
@@ -309,7 +309,7 @@ static void _x64_peephole_function(scf_vector_t* tmp_insts, scf_function_t* f, i
 
                if (x64_inst_data_is_reg(&inst->dst)) {
 
-                       r0 = (scf_register_x64_t*)inst->dst.base;
+                       r0 = (scf_register_t*)inst->dst.base;
 
                        if (X64_COLOR_CONFLICT(rax->color, r0->color))
                                continue;
@@ -333,8 +333,8 @@ static void _x64_peephole_function(scf_vector_t* tmp_insts, scf_function_t* f, i
 
                        if (x64_inst_data_is_reg(&inst->dst)) {
 
-                               r0 = (scf_register_x64_t*)inst ->dst.base;
-                               r1 = (scf_register_x64_t*)inst2->src.base;
+                               r0 = (scf_register_t*)inst ->dst.base;
+                               r1 = (scf_register_t*)inst2->src.base;
 
                                if (SCF_X64_CALL == inst2->OpCode->type) {
 
@@ -360,7 +360,7 @@ static void _x64_peephole_function(scf_vector_t* tmp_insts, scf_function_t* f, i
 
                                if (scf_inst_data_same(&inst->dst, &inst2->src))
                                        break;
-                               else if (rsp == (scf_register_x64_t*)inst->dst.base)
+                               else if (rsp == (scf_register_t*)inst->dst.base)
                                        break;
                                else if (SCF_OP_VA_START == inst->c->op->type
                                                || SCF_OP_VA_ARG == inst->c->op->type
@@ -443,7 +443,7 @@ static void _x64_peephole_function(scf_vector_t* tmp_insts, scf_function_t* f, i
 
 int x64_optimize_peephole(scf_native_t* ctx, scf_function_t* f)
 {
-       scf_register_x64_t* rbp = x64_find_register("rbp");
+       scf_register_t*     rbp = x64_find_register("rbp");
        scf_instruction_t*  std;
        scf_instruction_t*  inst;
        scf_instruction_t*  inst2;
index 73df09e6dfaa45b227c7e7824332f92f4abdcdf8..2738ccb2987e10df0950970fed1a44805d01775f 100644 (file)
@@ -12,7 +12,7 @@ static int _x64_rcg_node_cmp(const void* v0, const void* v1)
        return rn0->reg != rn1->reg;
 }
 
-int x64_rcg_find_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn, scf_register_x64_t* reg)
+int x64_rcg_find_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn, scf_register_t* reg)
 {
        x64_rcg_node_t* rn = calloc(1, sizeof(x64_rcg_node_t));
        if (!rn)
@@ -32,7 +32,7 @@ int x64_rcg_find_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn,
        return 0;
 }
 
-int _x64_rcg_make_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn, scf_register_x64_t* reg, scf_x64_OpCode_t* OpCode)
+int _x64_rcg_make_node(scf_graph_node_t** pp, scf_graph_t* g, scf_dag_node_t* dn, scf_register_t* reg, scf_x64_OpCode_t* OpCode)
 {
        x64_rcg_node_t* rn = calloc(1, sizeof(x64_rcg_node_t));
        if (!rn)
@@ -229,7 +229,7 @@ static int _x64_rcg_to_active_vars(scf_graph_t* g, scf_graph_node_t* gn0, scf_ve
 }
 
 static int _x64_rcg_make(scf_3ac_code_t* c, scf_graph_t* g, scf_dag_node_t* dn,
-               scf_register_x64_t* reg, scf_x64_OpCode_t* OpCode)
+               scf_register_t* reg, scf_x64_OpCode_t* OpCode)
 {
        scf_graph_node_t* gn0 = NULL;
        scf_graph_node_t* gn1;
@@ -261,7 +261,7 @@ static int _x64_rcg_make(scf_3ac_code_t* c, scf_graph_t* g, scf_dag_node_t* dn,
        return 0;
 }
 
-static int _x64_rcg_make2(scf_3ac_code_t* c, scf_dag_node_t* dn, scf_register_x64_t* reg, scf_x64_OpCode_t* OpCode)
+static int _x64_rcg_make2(scf_3ac_code_t* c, scf_dag_node_t* dn, scf_register_t* reg, scf_x64_OpCode_t* OpCode)
 {
        if (c->rcg)
                scf_graph_free(c->rcg);
@@ -278,7 +278,7 @@ static int _x64_rcg_call(scf_native_t* ctx, scf_3ac_code_t* c, scf_graph_t* g)
        scf_x64_context_t*  x64 = ctx->priv;
        scf_function_t*     f   = x64->f;
        scf_dag_node_t*     dn  = NULL;
-       scf_register_x64_t* r   = NULL;
+       scf_register_t* r   = NULL;
        scf_3ac_operand_t*  src = NULL;
        scf_3ac_operand_t*  dst = NULL;
        scf_graph_node_t*   gn  = NULL;
@@ -381,7 +381,7 @@ static int _x64_rcg_call(scf_native_t* ctx, scf_3ac_code_t* c, scf_graph_t* g)
 
                for (i = 0; i < nb_ints; i++) {
 
-                       scf_register_x64_t* rabi    = NULL;
+                       scf_register_t* rabi    = NULL;
                        scf_graph_node_t*   gn_rabi = NULL;
 
                        rabi = x64_find_register_type_id_bytes(0, x64_abi_regs[i], dn_pf->var->size);
@@ -558,8 +558,8 @@ static int _x64_rcg_mul_div_mod(scf_native_t* ctx, scf_3ac_code_t* c, scf_graph_
        int size = x64_variable_size(src->dag_node->var);
        int ret  = 0;
 
-       scf_register_x64_t* rl = x64_find_register_type_id_bytes(0, SCF_X64_REG_AX, size);
-       scf_register_x64_t* rh;
+       scf_register_t* rl = x64_find_register_type_id_bytes(0, SCF_X64_REG_AX, size);
+       scf_register_t* rh;
 
        if (1 == size)
                rh = x64_find_register("ah");
@@ -660,7 +660,7 @@ static int _x64_rcg_shift(scf_native_t* ctx, scf_3ac_code_t* c, scf_graph_t* g)
        scf_3ac_operand_t*  count = c->srcs->data[c->srcs->size - 1];
        scf_graph_node_t*   gn    = NULL;
        scf_graph_node_t*   gn_cl = NULL;
-       scf_register_x64_t* cl    = x64_find_register_type_id_bytes(0, SCF_X64_REG_CL, count->dag_node->var->size);
+       scf_register_t* cl    = x64_find_register_type_id_bytes(0, SCF_X64_REG_CL, count->dag_node->var->size);
 
        if (!count || !count->dag_node)
                return -EINVAL;
@@ -924,7 +924,7 @@ static int _x64_rcg_return_handler(scf_native_t* ctx, scf_3ac_code_t* c, scf_gra
 {
        int i;
 
-       scf_register_x64_t* r;
+       scf_register_t* r;
        scf_3ac_operand_t*  src;
        scf_graph_node_t*   gn;
        scf_dag_node_t*     dn;
@@ -971,10 +971,10 @@ static int _x64_rcg_memset_handler(scf_native_t* ctx, scf_3ac_code_t* c, scf_gra
 {
        int i;
 
-       scf_register_x64_t* r;
        scf_3ac_operand_t*  src;
        scf_graph_node_t*   gn;
        scf_dag_node_t*     dn;
+       scf_register_t*     r;
 
        int ret = _x64_rcg_make2(c, NULL, NULL, NULL);
        if (ret < 0)
index d113bb265f7ed6d3518b42a6f3630ec09a600081..ce11deb12e060a9d5815255698e97bc8da2e310b 100644 (file)
@@ -1,6 +1,6 @@
 #include"scf_x64.h"
 
-scf_register_x64_t     x64_registers[] = {
+scf_register_t x64_registers[] = {
 
        {0, 1, "al",     X64_COLOR(0, 0, 0x1),  NULL, 0},
        {0, 2, "ax",     X64_COLOR(0, 0, 0x3),  NULL, 0},
@@ -113,14 +113,14 @@ scf_register_x64_t        x64_registers[] = {
        {0xf, 8, "rip",  X64_COLOR(0, 7, 0xff), NULL, 0},
 };
 
-int x64_reg_cached_vars(scf_register_x64_t* r)
+int x64_reg_cached_vars(scf_register_t* r)
 {
        int nb_vars = 0;
        int i;
 
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r2 = &(x64_registers[i]);
+               scf_register_t* r2 = &(x64_registers[i]);
 
                if (SCF_X64_REG_RSP == r2->id || SCF_X64_REG_RBP == r2->id)
                        continue;
@@ -139,7 +139,7 @@ int x64_registers_init()
        int i;
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (SCF_X64_REG_RSP == r->id || SCF_X64_REG_RBP == r->id)
                        continue;
@@ -159,7 +159,7 @@ void x64_registers_clear()
        int i;
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (SCF_X64_REG_RSP == r->id || SCF_X64_REG_RBP == r->id)
                        continue;
@@ -171,14 +171,14 @@ void x64_registers_clear()
        }
 }
 
-int x64_caller_save_regs(scf_vector_t* instructions, uint32_t* regs, int nb_regs, int stack_size, scf_register_x64_t** saved_regs)
+int x64_caller_save_regs(scf_vector_t* instructions, uint32_t* regs, int nb_regs, int stack_size, scf_register_t** saved_regs)
 {
        int i;
        int j;
-       scf_register_x64_t* r;
-       scf_register_x64_t* r2;
+       scf_register_t* r;
+       scf_register_t* r2;
        scf_instruction_t*  inst;
-       scf_register_x64_t* rsp  = x64_find_register("rsp");
+       scf_register_t* rsp  = x64_find_register("rsp");
        scf_x64_OpCode_t*   mov  = x64_find_OpCode(SCF_X64_MOV,  8,8, SCF_X64_G2E);
        scf_x64_OpCode_t*   push = x64_find_OpCode(SCF_X64_PUSH, 8,8, SCF_X64_G);
 
@@ -242,8 +242,8 @@ int x64_push_regs(scf_vector_t* instructions, uint32_t* regs, int nb_regs)
 {
        int i;
        int j;
-       scf_register_x64_t* r;
-       scf_register_x64_t* r2;
+       scf_register_t* r;
+       scf_register_t* r2;
        scf_instruction_t*  inst;
        scf_x64_OpCode_t*   push = x64_find_OpCode(SCF_X64_PUSH, 8,8, SCF_X64_G);
 
@@ -272,14 +272,14 @@ int x64_push_regs(scf_vector_t* instructions, uint32_t* regs, int nb_regs)
        return 0;
 }
 
-int x64_pop_regs(scf_vector_t* instructions, scf_register_x64_t** regs, int nb_regs, scf_register_x64_t** updated_regs, int nb_updated)
+int x64_pop_regs(scf_vector_t* instructions, scf_register_t** regs, int nb_regs, scf_register_t** updated_regs, int nb_updated)
 {
        int i;
        int j;
 
-       scf_register_x64_t* rsp = x64_find_register("rsp");
-       scf_register_x64_t* r;
-       scf_register_x64_t* r2;
+       scf_register_t* rsp = x64_find_register("rsp");
+       scf_register_t* r;
+       scf_register_t* r2;
        scf_instruction_t*  inst;
        scf_x64_OpCode_t*   pop = x64_find_OpCode(SCF_X64_POP, 8, 8, SCF_X64_G);
        scf_x64_OpCode_t*   add = x64_find_OpCode(SCF_X64_ADD, 4, 4, SCF_X64_I2E);
@@ -329,7 +329,7 @@ int x64_registers_reset()
        int i;
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (SCF_X64_REG_RSP == r->id || SCF_X64_REG_RBP == r->id)
                        continue;
@@ -360,12 +360,12 @@ int x64_registers_reset()
        return 0;
 }
 
-scf_register_x64_t* x64_find_register(const char* name)
+scf_register_t* x64_find_register(const char* name)
 {
        int i;
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (!strcmp(r->name, name))
                        return r;
@@ -373,12 +373,12 @@ scf_register_x64_t* x64_find_register(const char* name)
        return NULL;
 }
 
-scf_register_x64_t* x64_find_register_type_id_bytes(uint32_t type, uint32_t id, int bytes)
+scf_register_t* x64_find_register_type_id_bytes(uint32_t type, uint32_t id, int bytes)
 {
        int i;
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (X64_COLOR_TYPE(r->color) == type && r->id == id && r->bytes == bytes)
                        return r;
@@ -386,12 +386,12 @@ scf_register_x64_t* x64_find_register_type_id_bytes(uint32_t type, uint32_t id,
        return NULL;
 }
 
-scf_register_x64_t* x64_find_register_color(intptr_t color)
+scf_register_t* x64_find_register_color(intptr_t color)
 {
        int i;
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (r->color == color)
                        return r;
@@ -399,12 +399,12 @@ scf_register_x64_t* x64_find_register_color(intptr_t color)
        return NULL;
 }
 
-scf_register_x64_t* x64_find_register_color_bytes(intptr_t color, int bytes)
+scf_register_t* x64_find_register_color_bytes(intptr_t color, int bytes)
 {
        int i;
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (X64_COLOR_CONFLICT(r->color, color) && r->bytes == bytes)
                        return r;
@@ -421,7 +421,7 @@ scf_vector_t* x64_register_colors()
        int i;
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (SCF_X64_REG_RSP == r->id || SCF_X64_REG_RBP == r->id)
                        continue;
@@ -452,7 +452,7 @@ scf_vector_t* x64_register_colors()
        return colors;
 }
 
-int x64_save_var2(scf_dag_node_t* dn, scf_register_x64_t* r, scf_3ac_code_t* c, scf_function_t* f)
+int x64_save_var2(scf_dag_node_t* dn, scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f)
 {
        scf_variable_t*     v    = dn->var;
        scf_rela_t*         rela = NULL;
@@ -528,12 +528,12 @@ int x64_save_var(scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
        if (dn->color <= 0)
                return -EINVAL;
 
-       scf_register_x64_t* r = x64_find_register_color(dn->color);
+       scf_register_t* r = x64_find_register_color(dn->color);
 
        return x64_save_var2(dn, r, c, f);
 }
 
-int x64_save_reg(scf_register_x64_t* r, scf_3ac_code_t* c, scf_function_t* f)
+int x64_save_reg(scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f)
 {
        int i = 0;
        while (i < r->dag_nodes->size) {
@@ -550,13 +550,13 @@ int x64_save_reg(scf_register_x64_t* r, scf_3ac_code_t* c, scf_function_t* f)
        return 0;
 }
 
-int x64_overflow_reg(scf_register_x64_t* r, scf_3ac_code_t* c, scf_function_t* f)
+int x64_overflow_reg(scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f)
 {
        int i;
 
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r2 = &(x64_registers[i]);
+               scf_register_t* r2 = &(x64_registers[i]);
 
                if (SCF_X64_REG_RSP == r2->id || SCF_X64_REG_RBP == r2->id)
                        continue;
@@ -574,9 +574,9 @@ int x64_overflow_reg(scf_register_x64_t* r, scf_3ac_code_t* c, scf_function_t* f
        return 0;
 }
 
-int x64_overflow_reg2(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
+int x64_overflow_reg2(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
 {
-       scf_register_x64_t*     r2;
+       scf_register_t* r2;
        scf_dag_node_t*     dn2;
 
        int i;
@@ -609,9 +609,9 @@ int x64_overflow_reg2(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac_code_t*
        return 0;
 }
 
-static int _x64_overflow_reg3(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
+static int _x64_overflow_reg3(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
 {
-       scf_register_x64_t*     r2;
+       scf_register_t* r2;
        scf_dn_status_t*    ds2;
        scf_dag_node_t*     dn2;
 
@@ -669,9 +669,9 @@ static int _x64_overflow_reg3(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac
        return 0;
 }
 
-int x64_reg_used(scf_register_x64_t* r, scf_dag_node_t* dn)
+int x64_reg_used(scf_register_t* r, scf_dag_node_t* dn)
 {
-       scf_register_x64_t*     r2;
+       scf_register_t* r2;
        scf_dag_node_t*     dn2;
 
        int i;
@@ -697,15 +697,15 @@ int x64_reg_used(scf_register_x64_t* r, scf_dag_node_t* dn)
        return 0;
 }
 
-static scf_register_x64_t* _x64_reg_cached_min_vars(scf_register_x64_t** regs, int nb_regs)
+static scf_register_t* _x64_reg_cached_min_vars(scf_register_t** regs, int nb_regs)
 {
-       scf_register_x64_t* r_min = NULL;
+       scf_register_t* r_min = NULL;
 
        int min = 0;
        int i;
 
        for (i = 0; i < nb_regs; i++) {
-               scf_register_x64_t*     r = regs[i];
+               scf_register_t* r = regs[i];
 
                int nb_vars = x64_reg_cached_vars(r);
 
@@ -724,12 +724,12 @@ static scf_register_x64_t* _x64_reg_cached_min_vars(scf_register_x64_t** regs, i
        return r_min;
 }
 
-scf_register_x64_t* x64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t* c)
+scf_register_t* x64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t* c)
 {
        scf_vector_t*       neighbors = NULL;
        scf_graph_node_t*   gn        = NULL;
 
-       scf_register_x64_t* free_regs[sizeof(x64_registers) / sizeof(x64_registers[0])];
+       scf_register_t* free_regs[sizeof(x64_registers) / sizeof(x64_registers[0])];
 
        int nb_free_regs = 0;
        int is_float     = scf_variable_float(dn->var);
@@ -748,7 +748,7 @@ scf_register_x64_t* x64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t
 
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (SCF_X64_REG_RSP == r->id || SCF_X64_REG_RBP == r->id)
                        continue;
@@ -793,7 +793,7 @@ scf_register_x64_t* x64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t
 
        for (i = 0; i < sizeof(x64_registers) / sizeof(x64_registers[0]); i++) {
 
-               scf_register_x64_t*     r = &(x64_registers[i]);
+               scf_register_t* r = &(x64_registers[i]);
 
                if (SCF_X64_REG_RSP == r->id || SCF_X64_REG_RBP == r->id)
                        continue;
@@ -846,7 +846,7 @@ scf_register_x64_t* x64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t
        return NULL;
 }
 
-static int _x64_load_reg_const(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
+static int _x64_load_reg_const(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
 {
        scf_instruction_t* inst;
        scf_x64_OpCode_t*  lea;
@@ -892,7 +892,7 @@ static int _x64_load_reg_const(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3a
        return 0;
 }
 
-int x64_load_reg(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
+int x64_load_reg(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f)
 {
        if (dn->loaded)
                return 0;
@@ -965,12 +965,12 @@ int x64_load_reg(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, s
        return 0;
 }
 
-int x64_select_reg(scf_register_x64_t** preg, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f, int load_flag)
+int x64_select_reg(scf_register_t** preg, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f, int load_flag)
 {
        if (0 == dn->color)
                return -EINVAL;
 
-       scf_register_x64_t* r;
+       scf_register_t* r;
 
        int ret;
        int is_float = scf_variable_float(dn->var);
@@ -1026,7 +1026,7 @@ int x64_select_reg(scf_register_x64_t** preg, scf_dag_node_t* dn, scf_3ac_code_t
 
 int x64_dereference_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* member, scf_3ac_code_t* c, scf_function_t* f)
 {
-       scf_register_x64_t* rb = NULL;
+       scf_register_t* rb = NULL;
        scf_variable_t*     vb = base->var;
 
        scf_logw("base->color: %ld\n", base->color);
@@ -1056,7 +1056,7 @@ int x64_pointer_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* member
 {
        scf_variable_t*     vb = base  ->var;
        scf_variable_t*     vm = member->var;
-       scf_register_x64_t* rb = NULL;
+       scf_register_t* rb = NULL;
 
        scf_x64_OpCode_t*   lea;
        scf_x64_OpCode_t*   mov;
@@ -1112,8 +1112,8 @@ int x64_array_index_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* in
        scf_variable_t*     vb    = base ->var;
        scf_variable_t*     vi    = index->var;
 
-       scf_register_x64_t* rb    = NULL;
-       scf_register_x64_t* ri    = NULL;
+       scf_register_t* rb    = NULL;
+       scf_register_t* ri    = NULL;
 
        scf_x64_OpCode_t*   xor;
        scf_x64_OpCode_t*   add;
@@ -1190,7 +1190,7 @@ int x64_array_index_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* in
                return ret;
        }
 
-       scf_register_x64_t* ri2 = x64_find_register_color_bytes(ri->color, 8);
+       scf_register_t* ri2 = x64_find_register_color_bytes(ri->color, 8);
 
        if (ri->bytes < ri2->bytes) {
 
@@ -1223,7 +1223,7 @@ int x64_array_index_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* in
 
                assert(8 == scale->var->size);
 
-               scf_register_x64_t* rs = NULL;
+               scf_register_t* rs = NULL;
 
                ret = x64_select_reg(&rs, scale, c, f, 0);
                if (ret < 0) {
index a168bbed36c3ddfb9077ab018d960a08124e6cdb..31b7bf02a6a10c6296c1e0969b2a8081b21c61db 100644 (file)
@@ -85,21 +85,8 @@ static uint32_t x64_abi_callee_saves[] =
 #define X64_ABI_CALLEE_SAVES_NB (sizeof(x64_abi_callee_saves) / sizeof(x64_abi_callee_saves[0]))
 
 typedef struct {
-       uint32_t                id;
-       int                             bytes;
-       char*                   name;
-
-       intptr_t        color;
-
-       scf_vector_t*   dag_nodes;
-
-       uint32_t        updated;
-
-} scf_register_x64_t;
-
-typedef struct {
-       scf_register_x64_t* base;
-       scf_register_x64_t* index;
+       scf_register_t* base;
+       scf_register_t* index;
 
        int32_t             scale;
        int32_t             disp;
@@ -124,37 +111,37 @@ int                 x64_registers_reset();
 void                x64_registers_clear();
 scf_vector_t*       x64_register_colors();
 
-scf_register_x64_t*    x64_find_register(const char* name);
+scf_register_t*     x64_find_register(const char* name);
 
-scf_register_x64_t* x64_find_register_type_id_bytes(uint32_t type, uint32_t id, int bytes);
+scf_register_t*     x64_find_register_type_id_bytes(uint32_t type, uint32_t id, int bytes);
 
-scf_register_x64_t* x64_find_register_color(intptr_t color);
+scf_register_t*     x64_find_register_color(intptr_t color);
 
-scf_register_x64_t* x64_find_register_color_bytes(intptr_t color, int bytes);
+scf_register_t*     x64_find_register_color_bytes(intptr_t color, int bytes);
 
-scf_register_x64_t*    x64_find_abi_register(int index, int bytes);
+scf_register_t*            x64_find_abi_register(int index, int bytes);
 
-scf_register_x64_t* x64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t* c);
+scf_register_t*     x64_select_overflowed_reg(scf_dag_node_t* dn, scf_3ac_code_t* c);
 
-int                 x64_reg_cached_vars(scf_register_x64_t* r);
+int                 x64_reg_cached_vars(scf_register_t* r);
 
 int                 x64_save_var(scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f);
 
-int                 x64_save_var2(scf_dag_node_t* dn, scf_register_x64_t* r, scf_3ac_code_t* c, scf_function_t* f);
+int                 x64_save_var2(scf_dag_node_t* dn, scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f);
 
 int                 x64_push_regs(scf_vector_t* instructions, uint32_t* regs, int nb_regs);
-int                 x64_pop_regs (scf_vector_t* instructions, scf_register_x64_t** regs, int nb_regs, scf_register_x64_t** updated_regs, int nb_updated);
-int                 x64_caller_save_regs(scf_vector_t* instructions, uint32_t* regs, int nb_regs, int stack_size, scf_register_x64_t** saved_regs);
+int                 x64_pop_regs (scf_vector_t* instructions, scf_register_t** regs, int nb_regs, scf_register_t** updated_regs, int nb_updated);
+int                 x64_caller_save_regs(scf_vector_t* instructions, uint32_t* regs, int nb_regs, int stack_size, scf_register_t** saved_regs);
 
-int                 x64_save_reg(scf_register_x64_t* r, scf_3ac_code_t* c, scf_function_t* f);
+int                 x64_save_reg(scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f);
 
-int                 x64_load_reg(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f);
-int                 x64_reg_used(scf_register_x64_t* r, scf_dag_node_t* dn);
+int                 x64_load_reg(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f);
+int                 x64_reg_used(scf_register_t* r, scf_dag_node_t* dn);
 
-int                 x64_overflow_reg (scf_register_x64_t* r, scf_3ac_code_t* c, scf_function_t* f);
-int                 x64_overflow_reg2(scf_register_x64_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f);
+int                 x64_overflow_reg (scf_register_t* r, scf_3ac_code_t* c, scf_function_t* f);
+int                 x64_overflow_reg2(scf_register_t* r, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f);
 
-int                 x64_select_reg(scf_register_x64_t** preg, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f, int load_flag);
+int                 x64_select_reg(scf_register_t** preg, scf_dag_node_t* dn, scf_3ac_code_t* c, scf_function_t* f, int load_flag);
 
 int                 x64_dereference_reg(x64_sib_t* sib, scf_dag_node_t* base, scf_dag_node_t* member, scf_3ac_code_t* c, scf_function_t* f);
 
index 98b9d9b62d7b25af1e176704174b31fe4f45002b..8ba157755fc25d002c3573c5c5e8921726989ca8 100644 (file)
@@ -1448,11 +1448,11 @@ static int _fill_function_inst(scf_string_t* code, scf_function_t* f, int64_t of
 
        f->code_bytes = 0;
 
-       if (f->init_insts) {
+       if (f->init_code) {
 
-               for (i = 0; i < f->init_insts->size; i++) {
+               for (i = 0; i < f->init_code->instructions->size; i++) {
 
-                       scf_instruction_t* inst = f->init_insts->data[i];
+                       scf_instruction_t* inst = f->init_code->instructions->data[i];
 
                        ret = scf_string_cat_cstr_len(code, inst->code, inst->len);
                        if (ret < 0)