{SCF_EDA_NAND4, 0, 0, 0, 0, 0, 0, 0, 0, 0, &__ttl_nand4_ops, "./cpk/ttl_nand4.cpk", NULL},
{SCF_EDA_AND2_OR, 0, 0, 0, 0, 0, 0, 0, 0, 0, &__ttl_and2_or_ops, "./cpk/ttl_and2_or.cpk", NULL},
{SCF_EDA_IF, 0, 0, 0, 0, 0, 0, 0, 0, 0, &__ttl_if_ops, "./cpk/ttl_if.cpk", NULL},
{SCF_EDA_MLA, 0, 0, 0, 0, 0, 0, 0, 0, 0, &__ttl_mla_ops, "./cpk/ttl_mla.cpk", NULL},
{SCF_EDA_NAND4, 0, 0, 0, 0, 0, 0, 0, 0, 0, &__ttl_nand4_ops, "./cpk/ttl_nand4.cpk", NULL},
{SCF_EDA_AND2_OR, 0, 0, 0, 0, 0, 0, 0, 0, 0, &__ttl_and2_or_ops, "./cpk/ttl_and2_or.cpk", NULL},
{SCF_EDA_IF, 0, 0, 0, 0, 0, 0, 0, 0, 0, &__ttl_if_ops, "./cpk/ttl_if.cpk", NULL},
{SCF_EDA_MLA, 0, 0, 0, 0, 0, 0, 0, 0, 0, &__ttl_mla_ops, "./cpk/ttl_mla.cpk", NULL},