1, don't analysize the tree layer struct of electronic graph before 'node analysis',
authoryu.dongliang <18588496441@163.com>
Sun, 4 May 2025 03:40:41 +0000 (11:40 +0800)
committeryu.dongliang <18588496441@163.com>
Sun, 4 May 2025 03:40:56 +0000 (11:40 +0800)
commit7e683d93c8ee7c544d55f4ae2c2f458000a68a30
treecabb32aca16ee0069794d3138439d62017f5947c
parent90ccc03db30383f750bdd13d8fec7e0e1a184d21
1, don't analysize the tree layer struct of electronic graph before 'node analysis',
2, add D-flip-flop & NOT gate with delay to support 'C-style for loop' in electronic graph.
35 files changed:
Makefile
cpk/Makefile
cpk/for_test.c [new file with mode: 0644]
cpk/ttl_adc.c [new file with mode: 0644]
cpk/ttl_adc.cpk [new file with mode: 0644]
cpk/ttl_adc_test.c [new file with mode: 0644]
cpk/ttl_ck_test.c [new file with mode: 0644]
cpk/ttl_d_flip_flop.c [new file with mode: 0644]
cpk/ttl_dff.cpk [new file with mode: 0644]
cpk/ttl_dff_test.c [new file with mode: 0644]
cpk/ttl_not_delay.c [new file with mode: 0644]
cpk/ttl_not_delay.cpk [new file with mode: 0644]
main.c
scf_eda_pack.c
scf_eda_pack.h
ses_core.h
ses_layout.c
ses_layout_function.c
ses_node_analysis.c
ses_step_ac_input.c [new file with mode: 0644]
ses_step_battery.c
ses_step_dc_diode.c
ses_step_dc_input.c
ses_step_dc_npn.c
ses_step_dc_pnp.c
ses_step_draw.c
ses_step_topo.c
ses_step_va.c
ses_step_va_nodes.c
ses_steps.c
ses_utils.c
test/Makefile
test/draw_timing.c [new file with mode: 0644]
test/two_battery.c [new file with mode: 0644]
test/v.txt